@@ -113,6 +113,11 @@ switch_to_hypervisor_ret:
ldr r0, =_start
mcr p15, 0, r0, c12, c0, 0 @Set VBAR
#endif
+#ifdef CPU_V7_HAS_VIRT
+ /* Set vector address in CP15 VBAR register */
+ ldr r0, =hyp_vector_table
+ mcr p15, 0, r0, c12, c0, 0 @Set HVBAR
+#endif
#endif
/* the mask ROM code should have PLL and others stable */
@@ -60,6 +60,14 @@ ENTRY(relocate_vectors)
ldmia r0!, {r2-r8,r10}
stmia r1!, {r2-r8,r10}
#endif
+#ifdef CONFIG_CPU_V7_HAS_VIRT
+ /*
+ * If the ARM processor has the virtualization extensions,
+ * use HVBAR to relocate the EL2 exception vectors.
+ */
+ ldr r0, =hyp_vector_table /* load dynamically relocated address */
+ mcr p15, 4, r0, c12, c0, 0 /* Set HVBAR */
+#endif
#endif
bx lr
This is the base address register for the vector table when in hypervisor mode. Signed-off-by: Jim Posen <jim.posen@gmail.com> --- arch/arm/cpu/armv7/start.S | 5 +++++ arch/arm/lib/relocate.S | 8 ++++++++ 2 files changed, 13 insertions(+)