@@ -14,8 +14,12 @@ arch-$(CONFIG_CPU_SA1100) =-march=armv4
arch-$(CONFIG_CPU_PXA) =
arch-$(CONFIG_CPU_ARM1136) =-march=armv5t
arch-$(CONFIG_CPU_ARM1176) =-march=armv5t
+ifeq ($(CONFIG_CPU_V7_HAS_VIRT),y)
+arch-$(CONFIG_CPU_V7A) =-march=armv7ve
+else
arch-$(CONFIG_CPU_V7A) =$(call cc-option, -march=armv7-a, \
$(call cc-option, -march=armv7))
+endif
arch-$(CONFIG_CPU_V7M) =-march=armv7-m
arch-$(CONFIG_CPU_V7R) =-march=armv7-r
ifeq ($(CONFIG_ARM64_CRC32),y)
@@ -8,6 +8,7 @@ config BCM2836
depends on ARCH_BCM283X
select ARMV7_LPAE
select CPU_V7A
+ select CPU_V7_HAS_VIRT
config BCM2837
bool "Broadcom BCM2837 SoC support"
@@ -19,6 +20,7 @@ config BCM2837_32B
select BCM2837
select ARMV7_LPAE
select CPU_V7A
+ select CPU_V7_HAS_VIRT
config BCM2837_64B
bool "Broadcom BCM2837 SoC 64-bit support"
@@ -36,6 +38,7 @@ config BCM2711_32B
select BCM2711
select ARMV7_LPAE
select CPU_V7A
+ select CPU_V7_HAS_VIRT
select PHYS_64BIT
config BCM2711_64B
@@ -19,6 +19,7 @@ config ARCH_EXYNOS5
bool "Exynos5 SoC family"
select BOARD_EARLY_INIT_F
select CPU_V7A
+ select CPU_V7_HAS_VIRT
select SHA_HW_ACCEL
imply CMD_HASH
imply CRC32_VERIFY
In order to assemble instructions that read the ELR_hyp register, which is part of the ARMv7-A virtualization extensions, the assembler target architecture needs to be changed. Signed-off-by: Jim Posen <jim.posen@gmail.com> --- arch/arm/Makefile | 4 ++++ arch/arm/mach-bcm283x/Kconfig | 3 +++ arch/arm/mach-exynos/Kconfig | 1 + 3 files changed, 8 insertions(+)