From patchwork Tue Sep 14 18:19:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Fazio X-Patchwork-Id: 1528191 X-Patchwork-Delegate: pbrobinson@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=xes-inc.com header.i=@xes-inc.com header.a=rsa-sha256 header.s=mail header.b=nnaHnVAQ; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4H8NRf5g7Rz9svs for ; Wed, 15 Sep 2021 11:49:02 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 5C46B82952; Wed, 15 Sep 2021 03:48:37 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=xes-inc.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=xes-inc.com header.i=@xes-inc.com header.b="nnaHnVAQ"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 11DAA80612; Tue, 14 Sep 2021 20:19:44 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail.xes-mad.com (mail.xes-mad.com [162.248.234.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 5875C82BFD for ; Tue, 14 Sep 2021 20:19:38 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=xes-inc.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=vfazio@xes-inc.com Received: from vfazio2.xes-mad.com (vfazio2.xes-mad.com [10.52.16.113]) by mail.xes-mad.com (Postfix) with ESMTP id D0B232241D; Tue, 14 Sep 2021 13:19:36 -0500 (CDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xes-inc.com; s=mail; t=1631643576; bh=U6L0YFdBm0gvt8orSRtyEWwfmsqm6wGSqL5+/X+Ckzc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nnaHnVAQlkFAX5ns4Dy9DgG7+2QxoqSP+Tnv3x4x43K7coqdvzHvSm72gn/4ehnQm VtdnhYUvtzncw/GDnOXSrpOyGTDDECKGie6zqkQqqRIl4DzThkLSoFj+S5nV+jbNWr 4qw7nheCX9bTrWYxD57xuW6HbLURtUns6CLyn1Hg= From: Vincent Fazio To: u-boot@lists.denx.de Cc: Matthias Brugger , Jaehoon Chung , Peng Fan , Vincent Fazio Subject: [PATCH 2/2] mmc: bcm2835-host: let firmware manage the clock divisor Date: Tue, 14 Sep 2021 13:19:19 -0500 Message-Id: <20210914181919.584951-3-vfazio@xes-inc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210914181919.584951-1-vfazio@xes-inc.com> References: <20210914181919.584951-1-vfazio@xes-inc.com> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 15 Sep 2021 03:48:23 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Newer firmware can manage the SDCDIV clock divisor register, allowing the divisor to scale with the core as necessary. Leverage this ability if the firmware supports it. Adapted from the following raspberrypi Linux kernel commit: bcm2835-sdhost: Firmware manages the clock divisor https://github.com/raspberrypi/linux/commit/08532d242d7702ae0add95096aa49c5e96e066e2 Signed-off-by: Vincent Fazio --- arch/arm/mach-bcm283x/include/mach/mbox.h | 16 +++++++ arch/arm/mach-bcm283x/include/mach/msg.h | 10 +++++ arch/arm/mach-bcm283x/msg.c | 28 ++++++++++++ drivers/mmc/bcm2835_sdhost.c | 53 ++++++++++++++--------- 4 files changed, 86 insertions(+), 21 deletions(-) diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h index 7dcac583cc..490664f878 100644 --- a/arch/arm/mach-bcm283x/include/mach/mbox.h +++ b/arch/arm/mach-bcm283x/include/mach/mbox.h @@ -252,6 +252,22 @@ struct bcm2835_mbox_tag_get_clock_rate { } body; }; +#define BCM2835_MBOX_TAG_SET_SDHOST_CLOCK 0x00038042 + +struct bcm2835_mbox_tag_set_sdhost_clock { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + u32 rate_hz; + } req; + struct { + u32 rate_hz; + u32 rate_1; + u32 rate_2; + } resp; + } body; +}; + #define BCM2835_MBOX_TAG_ALLOCATE_BUFFER 0x00040001 struct bcm2835_mbox_tag_allocate_buffer { diff --git a/arch/arm/mach-bcm283x/include/mach/msg.h b/arch/arm/mach-bcm283x/include/mach/msg.h index e45c1bf010..ab37abdb6c 100644 --- a/arch/arm/mach-bcm283x/include/mach/msg.h +++ b/arch/arm/mach-bcm283x/include/mach/msg.h @@ -22,6 +22,16 @@ int bcm2835_power_on_module(u32 module); */ int bcm2835_get_mmc_clock(u32 clock_id); +/** + * bcm2835_set_sdhost_clock() - determine if firmware controls sdhost cdiv + * + * @rate_hz: Input clock frequency + * @rate_1: Returns a clock frequency + * @rate_2: Returns a clock frequency + * @return 0 of OK, -EIO on error + */ +int bcm2835_set_sdhost_clock(u32 rate_hz, u32 *rate_1, u32 *rate_2); + /** * bcm2835_get_video_size() - get the current display size * diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c index ae85e9159e..adab15da4e 100644 --- a/arch/arm/mach-bcm283x/msg.c +++ b/arch/arm/mach-bcm283x/msg.c @@ -21,6 +21,12 @@ struct msg_get_clock_rate { u32 end_tag; }; +struct msg_set_sdhost_clock { + struct bcm2835_mbox_hdr hdr; + struct bcm2835_mbox_tag_set_sdhost_clock set_sdhost_clock; + u32 end_tag; +}; + struct msg_query { struct bcm2835_mbox_hdr hdr; struct bcm2835_mbox_tag_physical_w_h physical_w_h; @@ -110,6 +116,28 @@ int bcm2835_get_mmc_clock(u32 clock_id) return clock_rate; } +int bcm2835_set_sdhost_clock(u32 rate_hz, u32 *rate_1, u32 *rate_2) +{ + ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_sdhost_clock, msg_sdhost_clk, 1); + int ret; + + BCM2835_MBOX_INIT_HDR(msg_sdhost_clk); + BCM2835_MBOX_INIT_TAG(&msg_sdhost_clk->set_sdhost_clock, SET_SDHOST_CLOCK); + + msg_sdhost_clk->set_sdhost_clock.body.req.rate_hz = rate_hz; + + ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_sdhost_clk->hdr); + if (ret) { + printf("bcm2835: Could not query sdhost clock rate\n"); + return -EIO; + } + + *rate_1 = msg_sdhost_clk->set_sdhost_clock.body.resp.rate_1; + *rate_2 = msg_sdhost_clk->set_sdhost_clock.body.resp.rate_2; + + return 0; +} + int bcm2835_get_video_size(int *widthp, int *heightp) { ALLOC_CACHE_ALIGN_BUFFER(struct msg_query, msg_query, 1); diff --git a/drivers/mmc/bcm2835_sdhost.c b/drivers/mmc/bcm2835_sdhost.c index 894dbdd686..5c23c03d10 100644 --- a/drivers/mmc/bcm2835_sdhost.c +++ b/drivers/mmc/bcm2835_sdhost.c @@ -181,6 +181,7 @@ struct bcm2835_host { struct udevice *dev; struct mmc *mmc; struct bcm2835_plat *plat; + unsigned int firmware_sets_cdiv:1; }; static void bcm2835_dumpregs(struct bcm2835_host *host) @@ -233,7 +234,7 @@ static void bcm2835_reset_internal(struct bcm2835_host *host) msleep(20); host->clock = 0; writel(host->hcfg, host->ioaddr + SDHCFG); - writel(host->cdiv, host->ioaddr + SDCDIV); + writel(SDCDIV_MAX_CDIV, host->ioaddr + SDCDIV); } static int bcm2835_wait_transfer_complete(struct bcm2835_host *host) @@ -598,6 +599,7 @@ static int bcm2835_transmit(struct bcm2835_host *host) static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) { int div; + u32 clock_rate[2] = { 0 }; /* The SDCDIV register has 11 bits, and holds (div - 2). But * in data mode the max is 50MHz wihout a minimum, and only @@ -620,26 +622,34 @@ static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) * clock divisor at all times. */ - if (clock < 100000) { - /* Can't stop the clock, but make it as slow as possible - * to show willing - */ - host->cdiv = SDCDIV_MAX_CDIV; - writel(host->cdiv, host->ioaddr + SDCDIV); - return; - } + if (host->firmware_sets_cdiv) { + bcm2835_set_sdhost_clock(clock, &clock_rate[0], &clock_rate[1]); + clock = max(clock_rate[0], clock_rate[1]); + } else { + if (clock < 100000) { + /* Can't stop the clock, but make it as slow as possible + * to show willing + */ + host->cdiv = SDCDIV_MAX_CDIV; + writel(host->cdiv, host->ioaddr + SDCDIV); + return; + } - div = host->max_clk / clock; - if (div < 2) - div = 2; - if ((host->max_clk / div) > clock) - div++; - div -= 2; + div = host->max_clk / clock; + if (div < 2) + div = 2; + if ((host->max_clk / div) > clock) + div++; + div -= 2; - if (div > SDCDIV_MAX_CDIV) - div = SDCDIV_MAX_CDIV; + if (div > SDCDIV_MAX_CDIV) + div = SDCDIV_MAX_CDIV; + + clock = host->max_clk / (div + 2); + host->cdiv = div; + writel(host->cdiv, host->ioaddr + SDCDIV); + } - clock = host->max_clk / (div + 2); host->mmc->clock = clock; /* Calibrate some delays */ @@ -647,9 +657,6 @@ static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) host->ns_per_fifo_word = (1000000000 / clock) * ((host->mmc->card_caps & MMC_MODE_4BIT) ? 8 : 32); - host->cdiv = div; - writel(host->cdiv, host->ioaddr + SDCDIV); - /* Set the timeout to 500ms */ writel(host->mmc->clock / 2, host->ioaddr + SDTOUT); } @@ -759,6 +766,7 @@ static int bcm2835_probe(struct udevice *dev) struct bcm2835_host *host = dev_get_priv(dev); struct mmc *mmc = mmc_get_mmc_dev(dev); struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + u32 clock_rate[2] = { ~0 }; host->dev = dev; host->mmc = mmc; @@ -776,6 +784,9 @@ static int bcm2835_probe(struct udevice *dev) host->max_clk = bcm2835_get_mmc_clock(BCM2835_MBOX_CLOCK_ID_CORE); + bcm2835_set_sdhost_clock(0, &clock_rate[0], &clock_rate[1]); + host->firmware_sets_cdiv = (clock_rate[0] != ~0); + bcm2835_add_host(host); dev_dbg(dev, "%s -> OK\n", __func__);