Message ID | 20210510143613.16512-9-vigneshr@ti.com |
---|---|
State | Accepted |
Commit | 8441d49e60e0095acb1c9574135966ceefec4147 |
Delegated to: | Lokesh Vutla |
Headers | show |
Series | AM64x: DMA and ethernet support | expand |
On Mon, May 10, 2021 at 5:36 PM Vignesh Raghavendra <vigneshr@ti.com> wrote: > > CPSW NUSS IP on K3 SoCs can have more than one external port (upto 8) > Therefore increase AM65_CPSW_CPSWNU_MAX_PORTS to 9 (8 ext + 1 Root port) > as preparation to allow any one of the 8 ports to be used as ethernet > interface in U-Boot. > > Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> > --- > drivers/net/ti/am65-cpsw-nuss.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c > index e6954b64b7..9f11ce63b9 100644 > --- a/drivers/net/ti/am65-cpsw-nuss.c > +++ b/drivers/net/ti/am65-cpsw-nuss.c > @@ -26,7 +26,7 @@ > > #include "cpsw_mdio.h" > > -#define AM65_CPSW_CPSWNU_MAX_PORTS 2 > +#define AM65_CPSW_CPSWNU_MAX_PORTS 9 > > #define AM65_CPSW_SS_BASE 0x0 > #define AM65_CPSW_SGMII_BASE 0x100 > -- > 2.31.1 > Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c index e6954b64b7..9f11ce63b9 100644 --- a/drivers/net/ti/am65-cpsw-nuss.c +++ b/drivers/net/ti/am65-cpsw-nuss.c @@ -26,7 +26,7 @@ #include "cpsw_mdio.h" -#define AM65_CPSW_CPSWNU_MAX_PORTS 2 +#define AM65_CPSW_CPSWNU_MAX_PORTS 9 #define AM65_CPSW_SS_BASE 0x0 #define AM65_CPSW_SGMII_BASE 0x100
CPSW NUSS IP on K3 SoCs can have more than one external port (upto 8) Therefore increase AM65_CPSW_CPSWNU_MAX_PORTS to 9 (8 ext + 1 Root port) as preparation to allow any one of the 8 ports to be used as ethernet interface in U-Boot. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> --- drivers/net/ti/am65-cpsw-nuss.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)