From patchwork Thu Apr 8 13:40:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Green Wan X-Patchwork-Id: 1463799 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FGMw60QPmz9shn for ; Thu, 8 Apr 2021 23:45:25 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id DB8A780C6D; Thu, 8 Apr 2021 15:44:57 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 6C9868177A; Thu, 8 Apr 2021 15:44:23 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,RDNS_NONE, SPF_HELO_NONE,UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.2 Received: from transporter.internal.sifive.com (unknown [64.62.193.209]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4AF9880C77 for ; Thu, 8 Apr 2021 15:43:52 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=green.wan@sifive.com Received: from gamma15.internal.sifive.com (gamma15.internal.sifive.com [10.14.21.64]) by transporter.internal.sifive.com (Postfix) with ESMTPS id 75E8E204CF; Thu, 8 Apr 2021 06:43:51 -0700 (PDT) Received: from localhost (gamma15.internal.sifive.com [local]) by gamma15.internal.sifive.com (OpenSMTPD) with ESMTPA id e7128c4b; Thu, 8 Apr 2021 13:43:51 +0000 (UTC) From: Green Wan To: Cc: bmeng.cn@gmail.com, David Abdurachmanov , Green Wan , Ramon Fried , Rick Chen , Paul Walmsley , Palmer Dabbelt , Anup Patel , Atish Patra , Pragnesh Patel , Lukasz Majewski , Joe Hershberger , u-boot@lists.denx.de Subject: [PATCH v6 7/7] drivers: net: macb: add fu740 support Date: Thu, 8 Apr 2021 06:40:19 -0700 Message-Id: <20210408134020.238658-8-green.wan@sifive.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210408134020.238658-1-green.wan@sifive.com> References: <20210408134020.238658-1-green.wan@sifive.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean From: David Abdurachmanov Add fu740 support to macb ethernet driver There is a PLL HW quirk in FU740. The VSC8541XMV-02 specification requires 125 +/-0.0125 Mhz. But the most close value can be output by PLL is 125.125 MHz and out of VSC8541XMV-02 spec. Signed-off-by: David Abdurachmanov Signed-off-by: Green Wan Reviewed-by: Ramon Fried Reviewed-by: Bin Meng --- drivers/net/macb.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/net/macb.c b/drivers/net/macb.c index 57ea45e2dc..bf70525c54 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -591,8 +591,17 @@ static int macb_sifive_clk_init(struct udevice *dev, ulong rate) * 0 = GMII mode. Use 125 MHz gemgxlclk from PRCI in TX logic * and output clock on GMII output signal GTX_CLK * 1 = MII mode. Use MII input signal TX_CLK in TX logic + * + * FU740 have a PLL HW quirk. The 125.125 Mhz is actually out of + * VSC8541XMV-02 specification. The tolerance level is +/-100ppm. + * Which means the range should be in between 125MHz +/-0.0125. + * But the most close value can be output by PLL is 125.125 MHz. */ - writel(rate != 125000000, gemgxl_regs); + if (device_is_compatible(dev, "sifive,fu540-c000-gem")) + writel(rate != 125000000, gemgxl_regs); + else if (device_is_compatible(dev, "sifive,fu740-c000-gem")) + writel(rate != 125125000, gemgxl_regs); + return 0; } @@ -1507,6 +1516,8 @@ static const struct udevice_id macb_eth_ids[] = { { .compatible = "cdns,zynq-gem" }, { .compatible = "sifive,fu540-c000-gem", .data = (ulong)&sifive_config }, + { .compatible = "sifive,fu740-c000-gem", + .data = (ulong)&sifive_config }, { .compatible = "microchip,mpfs-mss-gem", .data = (ulong)µchip_config }, { }