diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 323c3587ae..7c053ace2b 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -20,6 +20,9 @@ config TARGET_QEMU_VIRT
 config TARGET_SIFIVE_UNLEASHED
 	bool "Support SiFive Unleashed Board"
 
+config TARGET_SIFIVE_UNMATCHED
+	bool "Support SiFive Unmatched Board"
+
 config TARGET_SIPEED_MAIX
 	bool "Support Sipeed Maix Board"
 
@@ -56,6 +59,7 @@ source "board/AndesTech/ax25-ae350/Kconfig"
 source "board/emulation/qemu-riscv/Kconfig"
 source "board/microchip/mpfs_icicle/Kconfig"
 source "board/sifive/unleashed/Kconfig"
+source "board/sifive/unmatched/Kconfig"
 source "board/sipeed/maix/Kconfig"
 
 # platform-specific options below
diff --git a/arch/riscv/dts/fu740-hifive-unmatched-a00-ddr.dtsi b/arch/riscv/dts/fu740-hifive-unmatched-a00-ddr.dtsi
new file mode 100644
index 0000000000..fc3dfd1959
--- /dev/null
+++ b/arch/riscv/dts/fu740-hifive-unmatched-a00-ddr.dtsi
@@ -0,0 +1,1489 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * (C) Copyright 2020-2021 SiFive, Inc
+ */
+
+&dmc {
+	sifive,ddr-params = <
+		0x00000a00	/* DENALI_CTL_00_DATA */
+		0x00000000	/* DENALI_CTL_01_DATA */
+		0x00000000	/* DENALI_CTL_02_DATA */
+		0x00000000	/* DENALI_CTL_03_DATA */
+		0x00000000	/* DENALI_CTL_04_DATA */
+		0x00000000	/* DENALI_CTL_05_DATA */
+		0x0000000a	/* DENALI_CTL_06_DATA */
+		0x0002d362	/* DENALI_CTL_07_DATA */
+		0x00071073	/* DENALI_CTL_08_DATA */
+		0x0a1c0255	/* DENALI_CTL_09_DATA */
+		0x1c1c0400	/* DENALI_CTL_10_DATA */
+		0x0404c90b	/* DENALI_CTL_11_DATA */
+		0x2b050405	/* DENALI_CTL_12_DATA */
+		0x0d0c081e	/* DENALI_CTL_13_DATA */
+		0x08090914	/* DENALI_CTL_14_DATA */
+		0x00fde718	/* DENALI_CTL_15_DATA */
+		0x00180a05	/* DENALI_CTL_16_DATA */
+		0x008b130d	/* DENALI_CTL_17_DATA */
+		0x01000118	/* DENALI_CTL_18_DATA */
+		0x0d032001	/* DENALI_CTL_19_DATA */
+		0x00000000	/* DENALI_CTL_20_DATA */
+		0x00000101	/* DENALI_CTL_21_DATA */
+		0x00000000	/* DENALI_CTL_22_DATA */
+		0x0a000000	/* DENALI_CTL_23_DATA */
+		0x00000000	/* DENALI_CTL_24_DATA */
+		0x01450100	/* DENALI_CTL_25_DATA */
+		0x00001c36	/* DENALI_CTL_26_DATA */
+		0x00000005	/* DENALI_CTL_27_DATA */
+		0x00170006	/* DENALI_CTL_28_DATA */
+		0x014e0400	/* DENALI_CTL_29_DATA */
+		0x03010000	/* DENALI_CTL_30_DATA */
+		0x000a0e00	/* DENALI_CTL_31_DATA */
+		0x04030200	/* DENALI_CTL_32_DATA */
+		0x0000031f	/* DENALI_CTL_33_DATA */
+		0x00070004	/* DENALI_CTL_34_DATA */
+		0x00000000	/* DENALI_CTL_35_DATA */
+		0x00000000	/* DENALI_CTL_36_DATA */
+		0x00000000	/* DENALI_CTL_37_DATA */
+		0x00000000	/* DENALI_CTL_38_DATA */
+		0x00000000	/* DENALI_CTL_39_DATA */
+		0x00000000	/* DENALI_CTL_40_DATA */
+		0x00000000	/* DENALI_CTL_41_DATA */
+		0x00000000	/* DENALI_CTL_42_DATA */
+		0x00000000	/* DENALI_CTL_43_DATA */
+		0x00000000	/* DENALI_CTL_44_DATA */
+		0x00000000	/* DENALI_CTL_45_DATA */
+		0x00000000	/* DENALI_CTL_46_DATA */
+		0x00000000	/* DENALI_CTL_47_DATA */
+		0x00000000	/* DENALI_CTL_48_DATA */
+		0x00000000	/* DENALI_CTL_49_DATA */
+		0x00000000	/* DENALI_CTL_50_DATA */
+		0x00000000	/* DENALI_CTL_51_DATA */
+		0x00000000	/* DENALI_CTL_52_DATA */
+		0x00000000	/* DENALI_CTL_53_DATA */
+		0x00000000	/* DENALI_CTL_54_DATA */
+		0x00000000	/* DENALI_CTL_55_DATA */
+		0x00000000	/* DENALI_CTL_56_DATA */
+		0x00000000	/* DENALI_CTL_57_DATA */
+		0x00000000	/* DENALI_CTL_58_DATA */
+		0x00000000	/* DENALI_CTL_59_DATA */
+		0x00000424	/* DENALI_CTL_60_DATA */
+		0x00000201	/* DENALI_CTL_61_DATA */
+		0x00001008	/* DENALI_CTL_62_DATA */
+		0x00000000	/* DENALI_CTL_63_DATA */
+		0x00000200	/* DENALI_CTL_64_DATA */
+		0x00000800	/* DENALI_CTL_65_DATA */
+		0x00000481	/* DENALI_CTL_66_DATA */
+		0x00000400	/* DENALI_CTL_67_DATA */
+		0x00000424	/* DENALI_CTL_68_DATA */
+		0x00000201	/* DENALI_CTL_69_DATA */
+		0x00001008	/* DENALI_CTL_70_DATA */
+		0x00000000	/* DENALI_CTL_71_DATA */
+		0x00000200	/* DENALI_CTL_72_DATA */
+		0x00000800	/* DENALI_CTL_73_DATA */
+		0x00000481	/* DENALI_CTL_74_DATA */
+		0x00000400	/* DENALI_CTL_75_DATA */
+		0x01010000	/* DENALI_CTL_76_DATA */
+		0x00000000	/* DENALI_CTL_77_DATA */
+		0x00000000	/* DENALI_CTL_78_DATA */
+		0x00000000	/* DENALI_CTL_79_DATA */
+		0x00000000	/* DENALI_CTL_80_DATA */
+		0x00000000	/* DENALI_CTL_81_DATA */
+		0x00000000	/* DENALI_CTL_82_DATA */
+		0x00000000	/* DENALI_CTL_83_DATA */
+		0x00000000	/* DENALI_CTL_84_DATA */
+		0x00000000	/* DENALI_CTL_85_DATA */
+		0x00000000	/* DENALI_CTL_86_DATA */
+		0x00000000	/* DENALI_CTL_87_DATA */
+		0x00000000	/* DENALI_CTL_88_DATA */
+		0x00000000	/* DENALI_CTL_89_DATA */
+		0x00000000	/* DENALI_CTL_90_DATA */
+		0x00000000	/* DENALI_CTL_91_DATA */
+		0x00000000	/* DENALI_CTL_92_DATA */
+		0x00000000	/* DENALI_CTL_93_DATA */
+		0x00000000	/* DENALI_CTL_94_DATA */
+		0x00000000	/* DENALI_CTL_95_DATA */
+		0x00000000	/* DENALI_CTL_96_DATA */
+		0x00000000	/* DENALI_CTL_97_DATA */
+		0x00000000	/* DENALI_CTL_98_DATA */
+		0x00000000	/* DENALI_CTL_99_DATA */
+		0x00000000	/* DENALI_CTL_100_DATA */
+		0x00000000	/* DENALI_CTL_101_DATA */
+		0x00000000	/* DENALI_CTL_102_DATA */
+		0x00000000	/* DENALI_CTL_103_DATA */
+		0x00000000	/* DENALI_CTL_104_DATA */
+		0x00000003	/* DENALI_CTL_105_DATA */
+		0x00000000	/* DENALI_CTL_106_DATA */
+		0x00000000	/* DENALI_CTL_107_DATA */
+		0x00000000	/* DENALI_CTL_108_DATA */
+		0x00000000	/* DENALI_CTL_109_DATA */
+		0x01000000	/* DENALI_CTL_110_DATA */
+		0x00040000	/* DENALI_CTL_111_DATA */
+		0x00800200	/* DENALI_CTL_112_DATA */
+		0x00000200	/* DENALI_CTL_113_DATA */
+		0x00000040	/* DENALI_CTL_114_DATA */
+		0x01000100	/* DENALI_CTL_115_DATA */
+		0x0a000002	/* DENALI_CTL_116_DATA */
+		0x0101ffff	/* DENALI_CTL_117_DATA */
+		0x01010101	/* DENALI_CTL_118_DATA */
+		0x01010101	/* DENALI_CTL_119_DATA */
+		0x0000010b	/* DENALI_CTL_120_DATA */
+		0x00000c03	/* DENALI_CTL_121_DATA */
+		0x00000000	/* DENALI_CTL_122_DATA */
+		0x00000000	/* DENALI_CTL_123_DATA */
+		0x00000000	/* DENALI_CTL_124_DATA */
+		0x00000000	/* DENALI_CTL_125_DATA */
+		0x00030300	/* DENALI_CTL_126_DATA */
+		0x00000000	/* DENALI_CTL_127_DATA */
+		0x00010101	/* DENALI_CTL_128_DATA */
+		0x00000000	/* DENALI_CTL_129_DATA */
+		0x00000000	/* DENALI_CTL_130_DATA */
+		0x00000000	/* DENALI_CTL_131_DATA */
+		0x00000000	/* DENALI_CTL_132_DATA */
+		0x00000000	/* DENALI_CTL_133_DATA */
+		0x00000000	/* DENALI_CTL_134_DATA */
+		0x00000000	/* DENALI_CTL_135_DATA */
+		0x00000000	/* DENALI_CTL_136_DATA */
+		0x00000000	/* DENALI_CTL_137_DATA */
+		0x00000000	/* DENALI_CTL_138_DATA */
+		0x00000000	/* DENALI_CTL_139_DATA */
+		0x00000000	/* DENALI_CTL_140_DATA */
+		0x00000000	/* DENALI_CTL_141_DATA */
+		0x00000000	/* DENALI_CTL_142_DATA */
+		0x00000000	/* DENALI_CTL_143_DATA */
+		0x00000000	/* DENALI_CTL_144_DATA */
+		0x00000000	/* DENALI_CTL_145_DATA */
+		0x00000000	/* DENALI_CTL_146_DATA */
+		0x00000000	/* DENALI_CTL_147_DATA */
+		0x00000000	/* DENALI_CTL_148_DATA */
+		0x00000000	/* DENALI_CTL_149_DATA */
+		0x00000000	/* DENALI_CTL_150_DATA */
+		0x00000000	/* DENALI_CTL_151_DATA */
+		0x00000000	/* DENALI_CTL_152_DATA */
+		0x00000000	/* DENALI_CTL_153_DATA */
+		0x00000000	/* DENALI_CTL_154_DATA */
+		0x00000000	/* DENALI_CTL_155_DATA */
+		0x00000000	/* DENALI_CTL_156_DATA */
+		0x00000000	/* DENALI_CTL_157_DATA */
+		0x00000000	/* DENALI_CTL_158_DATA */
+		0x00000000	/* DENALI_CTL_159_DATA */
+		0x00000000	/* DENALI_CTL_160_DATA */
+		0x02010102	/* DENALI_CTL_161_DATA */
+		0x0108070d	/* DENALI_CTL_162_DATA */
+		0x05050300	/* DENALI_CTL_163_DATA */
+		0x04000503	/* DENALI_CTL_164_DATA */
+		0x00000000	/* DENALI_CTL_165_DATA */
+		0x00000000	/* DENALI_CTL_166_DATA */
+		0x00000000	/* DENALI_CTL_167_DATA */
+		0x00000000	/* DENALI_CTL_168_DATA */
+		0x280d0000	/* DENALI_CTL_169_DATA */
+		0x01000000	/* DENALI_CTL_170_DATA */
+		0x00000000	/* DENALI_CTL_171_DATA */
+		0x00030001	/* DENALI_CTL_172_DATA */
+		0x00000000	/* DENALI_CTL_173_DATA */
+		0x00000000	/* DENALI_CTL_174_DATA */
+		0x00000000	/* DENALI_CTL_175_DATA */
+		0x00000000	/* DENALI_CTL_176_DATA */
+		0x00000000	/* DENALI_CTL_177_DATA */
+		0x00000000	/* DENALI_CTL_178_DATA */
+		0x00000000	/* DENALI_CTL_179_DATA */
+		0x00000000	/* DENALI_CTL_180_DATA */
+		0x01000000	/* DENALI_CTL_181_DATA */
+		0x00000001	/* DENALI_CTL_182_DATA */
+		0x00000100	/* DENALI_CTL_183_DATA */
+		0x00010303	/* DENALI_CTL_184_DATA */
+		0x67676701	/* DENALI_CTL_185_DATA */
+		0x67676767	/* DENALI_CTL_186_DATA */
+		0x67676767	/* DENALI_CTL_187_DATA */
+		0x67676767	/* DENALI_CTL_188_DATA */
+		0x67676767	/* DENALI_CTL_189_DATA */
+		0x67676767	/* DENALI_CTL_190_DATA */
+		0x67676767	/* DENALI_CTL_191_DATA */
+		0x67676767	/* DENALI_CTL_192_DATA */
+		0x67676767	/* DENALI_CTL_193_DATA */
+		0x01000067	/* DENALI_CTL_194_DATA */
+		0x00000001	/* DENALI_CTL_195_DATA */
+		0x00000101	/* DENALI_CTL_196_DATA */
+		0x00000000	/* DENALI_CTL_197_DATA */
+		0x00000000	/* DENALI_CTL_198_DATA */
+		0x00000000	/* DENALI_CTL_199_DATA */
+		0x00000000	/* DENALI_CTL_200_DATA */
+		0x00000000	/* DENALI_CTL_201_DATA */
+		0x00000000	/* DENALI_CTL_202_DATA */
+		0x00000000	/* DENALI_CTL_203_DATA */
+		0x00000000	/* DENALI_CTL_204_DATA */
+		0x00000000	/* DENALI_CTL_205_DATA */
+		0x00000000	/* DENALI_CTL_206_DATA */
+		0x00000000	/* DENALI_CTL_207_DATA */
+		0x00000001	/* DENALI_CTL_208_DATA */
+		0x00000000	/* DENALI_CTL_209_DATA */
+		0x007fffff	/* DENALI_CTL_210_DATA */
+		0x00000000	/* DENALI_CTL_211_DATA */
+		0x007fffff	/* DENALI_CTL_212_DATA */
+		0x00000000	/* DENALI_CTL_213_DATA */
+		0x007fffff	/* DENALI_CTL_214_DATA */
+		0x00000000	/* DENALI_CTL_215_DATA */
+		0x007fffff	/* DENALI_CTL_216_DATA */
+		0x00000000	/* DENALI_CTL_217_DATA */
+		0x007fffff	/* DENALI_CTL_218_DATA */
+		0x00000000	/* DENALI_CTL_219_DATA */
+		0x007fffff	/* DENALI_CTL_220_DATA */
+		0x00000000	/* DENALI_CTL_221_DATA */
+		0x007fffff	/* DENALI_CTL_222_DATA */
+		0x00000000	/* DENALI_CTL_223_DATA */
+		0x037fffff	/* DENALI_CTL_224_DATA */
+		0xffffffff	/* DENALI_CTL_225_DATA */
+		0x000f000f	/* DENALI_CTL_226_DATA */
+		0x00ffff03	/* DENALI_CTL_227_DATA */
+		0x000fffff	/* DENALI_CTL_228_DATA */
+		0x0003000f	/* DENALI_CTL_229_DATA */
+		0xffffffff	/* DENALI_CTL_230_DATA */
+		0x000f000f	/* DENALI_CTL_231_DATA */
+		0x00ffff03	/* DENALI_CTL_232_DATA */
+		0x000fffff	/* DENALI_CTL_233_DATA */
+		0x0003000f	/* DENALI_CTL_234_DATA */
+		0xffffffff	/* DENALI_CTL_235_DATA */
+		0x000f000f	/* DENALI_CTL_236_DATA */
+		0x00ffff03	/* DENALI_CTL_237_DATA */
+		0x000fffff	/* DENALI_CTL_238_DATA */
+		0x0003000f	/* DENALI_CTL_239_DATA */
+		0xffffffff	/* DENALI_CTL_240_DATA */
+		0x000f000f	/* DENALI_CTL_241_DATA */
+		0x00ffff03	/* DENALI_CTL_242_DATA */
+		0x000fffff	/* DENALI_CTL_243_DATA */
+		0x6407000f	/* DENALI_CTL_244_DATA */
+		0x01640001	/* DENALI_CTL_245_DATA */
+		0x00000000	/* DENALI_CTL_246_DATA */
+		0x00000000	/* DENALI_CTL_247_DATA */
+		0x00001800	/* DENALI_CTL_248_DATA */
+		0x00386c05	/* DENALI_CTL_249_DATA */
+		0x02000200	/* DENALI_CTL_250_DATA */
+		0x02000200	/* DENALI_CTL_251_DATA */
+		0x0000386c	/* DENALI_CTL_252_DATA */
+		0x00023438	/* DENALI_CTL_253_DATA */
+		0x02020d0f	/* DENALI_CTL_254_DATA */
+		0x00140303	/* DENALI_CTL_255_DATA */
+		0x00000000	/* DENALI_CTL_256_DATA */
+		0x00000000	/* DENALI_CTL_257_DATA */
+		0x00001403	/* DENALI_CTL_258_DATA */
+		0x00000000	/* DENALI_CTL_259_DATA */
+		0x00000000	/* DENALI_CTL_260_DATA */
+		0x00000000	/* DENALI_CTL_261_DATA */
+		0x00000000	/* DENALI_CTL_262_DATA */
+		0x0c010000	/* DENALI_CTL_263_DATA */
+		0x00000008	/* DENALI_CTL_264_DATA */
+		0x01375642	/* DENALI_PHY_00_DATA */
+		0x0004c008	/* DENALI_PHY_01_DATA */
+		0x000000da	/* DENALI_PHY_02_DATA */
+		0x00000000	/* DENALI_PHY_03_DATA */
+		0x00000000	/* DENALI_PHY_04_DATA */
+		0x00010000	/* DENALI_PHY_05_DATA */
+		0x01DDDD90	/* DENALI_PHY_06_DATA */
+		0x01DDDD90	/* DENALI_PHY_07_DATA */
+		0x01030001	/* DENALI_PHY_08_DATA */
+		0x01000000	/* DENALI_PHY_09_DATA */
+		0x00c00000	/* DENALI_PHY_10_DATA */
+		0x00000007	/* DENALI_PHY_11_DATA */
+		0x00000000	/* DENALI_PHY_12_DATA */
+		0x00000000	/* DENALI_PHY_13_DATA */
+		0x04000408	/* DENALI_PHY_14_DATA */
+		0x00000408	/* DENALI_PHY_15_DATA */
+		0x00e4e400	/* DENALI_PHY_16_DATA */
+		0x00000000	/* DENALI_PHY_17_DATA */
+		0x00000000	/* DENALI_PHY_18_DATA */
+		0x00000000	/* DENALI_PHY_19_DATA */
+		0x00000000	/* DENALI_PHY_20_DATA */
+		0x00000000	/* DENALI_PHY_21_DATA */
+		0x00000000	/* DENALI_PHY_22_DATA */
+		0x00000000	/* DENALI_PHY_23_DATA */
+		0x00000000	/* DENALI_PHY_24_DATA */
+		0x00000000	/* DENALI_PHY_25_DATA */
+		0x00000000	/* DENALI_PHY_26_DATA */
+		0x00000000	/* DENALI_PHY_27_DATA */
+		0x00000000	/* DENALI_PHY_28_DATA */
+		0x00000000	/* DENALI_PHY_29_DATA */
+		0x00000000	/* DENALI_PHY_30_DATA */
+		0x00000000	/* DENALI_PHY_31_DATA */
+		0x00000000	/* DENALI_PHY_32_DATA */
+		0x00200000	/* DENALI_PHY_33_DATA */
+		0x00000000	/* DENALI_PHY_34_DATA */
+		0x00000000	/* DENALI_PHY_35_DATA */
+		0x00000000	/* DENALI_PHY_36_DATA */
+		0x00000000	/* DENALI_PHY_37_DATA */
+		0x00000000	/* DENALI_PHY_38_DATA */
+		0x00000000	/* DENALI_PHY_39_DATA */
+		0x02800280	/* DENALI_PHY_40_DATA */
+		0x02800280	/* DENALI_PHY_41_DATA */
+		0x02800280	/* DENALI_PHY_42_DATA */
+		0x02800280	/* DENALI_PHY_43_DATA */
+		0x00000280	/* DENALI_PHY_44_DATA */
+		0x00000000	/* DENALI_PHY_45_DATA */
+		0x00000000	/* DENALI_PHY_46_DATA */
+		0x00000000	/* DENALI_PHY_47_DATA */
+		0x00000000	/* DENALI_PHY_48_DATA */
+		0x00000000	/* DENALI_PHY_49_DATA */
+		0x00800080	/* DENALI_PHY_50_DATA */
+		0x00800080	/* DENALI_PHY_51_DATA */
+		0x00800080	/* DENALI_PHY_52_DATA */
+		0x00800080	/* DENALI_PHY_53_DATA */
+		0x00800080	/* DENALI_PHY_54_DATA */
+		0x00800080	/* DENALI_PHY_55_DATA */
+		0x00800080	/* DENALI_PHY_56_DATA */
+		0x00800080	/* DENALI_PHY_57_DATA */
+		0x00800080	/* DENALI_PHY_58_DATA */
+		0x000100da	/* DENALI_PHY_59_DATA */
+		0x01ff0010	/* DENALI_PHY_60_DATA */
+		0x00000000	/* DENALI_PHY_61_DATA */
+		0x00000000	/* DENALI_PHY_62_DATA */
+		0x00000002	/* DENALI_PHY_63_DATA */
+		0x51313152	/* DENALI_PHY_64_DATA */
+		0x80013130	/* DENALI_PHY_65_DATA */
+		0x02000080	/* DENALI_PHY_66_DATA */
+		0x00100001	/* DENALI_PHY_67_DATA */
+		0x0c064208	/* DENALI_PHY_68_DATA */
+		0x000f0c0f	/* DENALI_PHY_69_DATA */
+		0x01000140	/* DENALI_PHY_70_DATA */
+		0x0000000c	/* DENALI_PHY_71_DATA */
+		0x00000000	/* DENALI_PHY_72_DATA */
+		0x00000000	/* DENALI_PHY_73_DATA */
+		0x00000000	/* DENALI_PHY_74_DATA */
+		0x00000000	/* DENALI_PHY_75_DATA */
+		0x00000000	/* DENALI_PHY_76_DATA */
+		0x00000000	/* DENALI_PHY_77_DATA */
+		0x00000000	/* DENALI_PHY_78_DATA */
+		0x00000000	/* DENALI_PHY_79_DATA */
+		0x00000000	/* DENALI_PHY_80_DATA */
+		0x00000000	/* DENALI_PHY_81_DATA */
+		0x00000000	/* DENALI_PHY_82_DATA */
+		0x00000000	/* DENALI_PHY_83_DATA */
+		0x00000000	/* DENALI_PHY_84_DATA */
+		0x00000000	/* DENALI_PHY_85_DATA */
+		0x00000000	/* DENALI_PHY_86_DATA */
+		0x00000000	/* DENALI_PHY_87_DATA */
+		0x00000000	/* DENALI_PHY_88_DATA */
+		0x00000000	/* DENALI_PHY_89_DATA */
+		0x00000000	/* DENALI_PHY_90_DATA */
+		0x00000000	/* DENALI_PHY_91_DATA */
+		0x00000000	/* DENALI_PHY_92_DATA */
+		0x00000000	/* DENALI_PHY_93_DATA */
+		0x00000000	/* DENALI_PHY_94_DATA */
+		0x00000000	/* DENALI_PHY_95_DATA */
+		0x00000000	/* DENALI_PHY_96_DATA */
+		0x00000000	/* DENALI_PHY_97_DATA */
+		0x00000000	/* DENALI_PHY_98_DATA */
+		0x00000000	/* DENALI_PHY_99_DATA */
+		0x00000000	/* DENALI_PHY_100_DATA */
+		0x00000000	/* DENALI_PHY_101_DATA */
+		0x00000000	/* DENALI_PHY_102_DATA */
+		0x00000000	/* DENALI_PHY_103_DATA */
+		0x00000000	/* DENALI_PHY_104_DATA */
+		0x00000000	/* DENALI_PHY_105_DATA */
+		0x00000000	/* DENALI_PHY_106_DATA */
+		0x00000000	/* DENALI_PHY_107_DATA */
+		0x00000000	/* DENALI_PHY_108_DATA */
+		0x00000000	/* DENALI_PHY_109_DATA */
+		0x00000000	/* DENALI_PHY_110_DATA */
+		0x00000000	/* DENALI_PHY_111_DATA */
+		0x00000000	/* DENALI_PHY_112_DATA */
+		0x00000000	/* DENALI_PHY_113_DATA */
+		0x00000000	/* DENALI_PHY_114_DATA */
+		0x00000000	/* DENALI_PHY_115_DATA */
+		0x00000000	/* DENALI_PHY_116_DATA */
+		0x00000000	/* DENALI_PHY_117_DATA */
+		0x00000000	/* DENALI_PHY_118_DATA */
+		0x00000000	/* DENALI_PHY_119_DATA */
+		0x00000000	/* DENALI_PHY_120_DATA */
+		0x00000000	/* DENALI_PHY_121_DATA */
+		0x00000000	/* DENALI_PHY_122_DATA */
+		0x00000000	/* DENALI_PHY_123_DATA */
+		0x00000000	/* DENALI_PHY_124_DATA */
+		0x00000000	/* DENALI_PHY_125_DATA */
+		0x00000000	/* DENALI_PHY_126_DATA */
+		0x00000000	/* DENALI_PHY_127_DATA */
+		0x40263571	/* DENALI_PHY_128_DATA */
+		0x0004c008	/* DENALI_PHY_129_DATA */
+		0x000000da	/* DENALI_PHY_130_DATA */
+		0x00000000	/* DENALI_PHY_131_DATA */
+		0x00000000	/* DENALI_PHY_132_DATA */
+		0x00010000	/* DENALI_PHY_133_DATA */
+		0x01DDDD90	/* DENALI_PHY_134_DATA */
+		0x01DDDD90	/* DENALI_PHY_135_DATA */
+		0x01030001	/* DENALI_PHY_136_DATA */
+		0x01000000	/* DENALI_PHY_137_DATA */
+		0x00c00000	/* DENALI_PHY_138_DATA */
+		0x00000007	/* DENALI_PHY_139_DATA */
+		0x00000000	/* DENALI_PHY_140_DATA */
+		0x00000000	/* DENALI_PHY_141_DATA */
+		0x04000408	/* DENALI_PHY_142_DATA */
+		0x00000408	/* DENALI_PHY_143_DATA */
+		0x00e4e400	/* DENALI_PHY_144_DATA */
+		0x00000000	/* DENALI_PHY_145_DATA */
+		0x00000000	/* DENALI_PHY_146_DATA */
+		0x00000000	/* DENALI_PHY_147_DATA */
+		0x00000000	/* DENALI_PHY_148_DATA */
+		0x00000000	/* DENALI_PHY_149_DATA */
+		0x00000000	/* DENALI_PHY_150_DATA */
+		0x00000000	/* DENALI_PHY_151_DATA */
+		0x00000000	/* DENALI_PHY_152_DATA */
+		0x00000000	/* DENALI_PHY_153_DATA */
+		0x00000000	/* DENALI_PHY_154_DATA */
+		0x00000000	/* DENALI_PHY_155_DATA */
+		0x00000000	/* DENALI_PHY_156_DATA */
+		0x00000000	/* DENALI_PHY_157_DATA */
+		0x00000000	/* DENALI_PHY_158_DATA */
+		0x00000000	/* DENALI_PHY_159_DATA */
+		0x00000000	/* DENALI_PHY_160_DATA */
+		0x00200000	/* DENALI_PHY_161_DATA */
+		0x00000000	/* DENALI_PHY_162_DATA */
+		0x00000000	/* DENALI_PHY_163_DATA */
+		0x00000000	/* DENALI_PHY_164_DATA */
+		0x00000000	/* DENALI_PHY_165_DATA */
+		0x00000000	/* DENALI_PHY_166_DATA */
+		0x00000000	/* DENALI_PHY_167_DATA */
+		0x02800280	/* DENALI_PHY_168_DATA */
+		0x02800280	/* DENALI_PHY_169_DATA */
+		0x02800280	/* DENALI_PHY_170_DATA */
+		0x02800280	/* DENALI_PHY_171_DATA */
+		0x00000280	/* DENALI_PHY_172_DATA */
+		0x00000000	/* DENALI_PHY_173_DATA */
+		0x00000000	/* DENALI_PHY_174_DATA */
+		0x00000000	/* DENALI_PHY_175_DATA */
+		0x00000000	/* DENALI_PHY_176_DATA */
+		0x00000000	/* DENALI_PHY_177_DATA */
+		0x00800080	/* DENALI_PHY_178_DATA */
+		0x00800080	/* DENALI_PHY_179_DATA */
+		0x00800080	/* DENALI_PHY_180_DATA */
+		0x00800080	/* DENALI_PHY_181_DATA */
+		0x00800080	/* DENALI_PHY_182_DATA */
+		0x00800080	/* DENALI_PHY_183_DATA */
+		0x00800080	/* DENALI_PHY_184_DATA */
+		0x00800080	/* DENALI_PHY_185_DATA */
+		0x00800080	/* DENALI_PHY_186_DATA */
+		0x000100da	/* DENALI_PHY_187_DATA */
+		0x01ff0010	/* DENALI_PHY_188_DATA */
+		0x00000000	/* DENALI_PHY_189_DATA */
+		0x00000000	/* DENALI_PHY_190_DATA */
+		0x00000002	/* DENALI_PHY_191_DATA */
+		0x51313152	/* DENALI_PHY_192_DATA */
+		0x80013130	/* DENALI_PHY_193_DATA */
+		0x02000080	/* DENALI_PHY_194_DATA */
+		0x00100001	/* DENALI_PHY_195_DATA */
+		0x0c064208	/* DENALI_PHY_196_DATA */
+		0x000f0c0f	/* DENALI_PHY_197_DATA */
+		0x01000140	/* DENALI_PHY_198_DATA */
+		0x0000000c	/* DENALI_PHY_199_DATA */
+		0x00000000	/* DENALI_PHY_200_DATA */
+		0x00000000	/* DENALI_PHY_201_DATA */
+		0x00000000	/* DENALI_PHY_202_DATA */
+		0x00000000	/* DENALI_PHY_203_DATA */
+		0x00000000	/* DENALI_PHY_204_DATA */
+		0x00000000	/* DENALI_PHY_205_DATA */
+		0x00000000	/* DENALI_PHY_206_DATA */
+		0x00000000	/* DENALI_PHY_207_DATA */
+		0x00000000	/* DENALI_PHY_208_DATA */
+		0x00000000	/* DENALI_PHY_209_DATA */
+		0x00000000	/* DENALI_PHY_210_DATA */
+		0x00000000	/* DENALI_PHY_211_DATA */
+		0x00000000	/* DENALI_PHY_212_DATA */
+		0x00000000	/* DENALI_PHY_213_DATA */
+		0x00000000	/* DENALI_PHY_214_DATA */
+		0x00000000	/* DENALI_PHY_215_DATA */
+		0x00000000	/* DENALI_PHY_216_DATA */
+		0x00000000	/* DENALI_PHY_217_DATA */
+		0x00000000	/* DENALI_PHY_218_DATA */
+		0x00000000	/* DENALI_PHY_219_DATA */
+		0x00000000	/* DENALI_PHY_220_DATA */
+		0x00000000	/* DENALI_PHY_221_DATA */
+		0x00000000	/* DENALI_PHY_222_DATA */
+		0x00000000	/* DENALI_PHY_223_DATA */
+		0x00000000	/* DENALI_PHY_224_DATA */
+		0x00000000	/* DENALI_PHY_225_DATA */
+		0x00000000	/* DENALI_PHY_226_DATA */
+		0x00000000	/* DENALI_PHY_227_DATA */
+		0x00000000	/* DENALI_PHY_228_DATA */
+		0x00000000	/* DENALI_PHY_229_DATA */
+		0x00000000	/* DENALI_PHY_230_DATA */
+		0x00000000	/* DENALI_PHY_231_DATA */
+		0x00000000	/* DENALI_PHY_232_DATA */
+		0x00000000	/* DENALI_PHY_233_DATA */
+		0x00000000	/* DENALI_PHY_234_DATA */
+		0x00000000	/* DENALI_PHY_235_DATA */
+		0x00000000	/* DENALI_PHY_236_DATA */
+		0x00000000	/* DENALI_PHY_237_DATA */
+		0x00000000	/* DENALI_PHY_238_DATA */
+		0x00000000	/* DENALI_PHY_239_DATA */
+		0x00000000	/* DENALI_PHY_240_DATA */
+		0x00000000	/* DENALI_PHY_241_DATA */
+		0x00000000	/* DENALI_PHY_242_DATA */
+		0x00000000	/* DENALI_PHY_243_DATA */
+		0x00000000	/* DENALI_PHY_244_DATA */
+		0x00000000	/* DENALI_PHY_245_DATA */
+		0x00000000	/* DENALI_PHY_246_DATA */
+		0x00000000	/* DENALI_PHY_247_DATA */
+		0x00000000	/* DENALI_PHY_248_DATA */
+		0x00000000	/* DENALI_PHY_249_DATA */
+		0x00000000	/* DENALI_PHY_250_DATA */
+		0x00000000	/* DENALI_PHY_251_DATA */
+		0x00000000	/* DENALI_PHY_252_DATA */
+		0x00000000	/* DENALI_PHY_253_DATA */
+		0x00000000	/* DENALI_PHY_254_DATA */
+		0x00000000	/* DENALI_PHY_255_DATA */
+		0x46052371	/* DENALI_PHY_256_DATA */
+		0x0004c008	/* DENALI_PHY_257_DATA */
+		0x000000da	/* DENALI_PHY_258_DATA */
+		0x00000000	/* DENALI_PHY_259_DATA */
+		0x00000000	/* DENALI_PHY_260_DATA */
+		0x00010000	/* DENALI_PHY_261_DATA */
+		0x01DDDD90	/* DENALI_PHY_262_DATA */
+		0x01DDDD90	/* DENALI_PHY_263_DATA */
+		0x01030001	/* DENALI_PHY_264_DATA */
+		0x01000000	/* DENALI_PHY_265_DATA */
+		0x00c00000	/* DENALI_PHY_266_DATA */
+		0x00000007	/* DENALI_PHY_267_DATA */
+		0x00000000	/* DENALI_PHY_268_DATA */
+		0x00000000	/* DENALI_PHY_269_DATA */
+		0x04000408	/* DENALI_PHY_270_DATA */
+		0x00000408	/* DENALI_PHY_271_DATA */
+		0x00e4e400	/* DENALI_PHY_272_DATA */
+		0x00000000	/* DENALI_PHY_273_DATA */
+		0x00000000	/* DENALI_PHY_274_DATA */
+		0x00000000	/* DENALI_PHY_275_DATA */
+		0x00000000	/* DENALI_PHY_276_DATA */
+		0x00000000	/* DENALI_PHY_277_DATA */
+		0x00000000	/* DENALI_PHY_278_DATA */
+		0x00000000	/* DENALI_PHY_279_DATA */
+		0x00000000	/* DENALI_PHY_280_DATA */
+		0x00000000	/* DENALI_PHY_281_DATA */
+		0x00000000	/* DENALI_PHY_282_DATA */
+		0x00000000	/* DENALI_PHY_283_DATA */
+		0x00000000	/* DENALI_PHY_284_DATA */
+		0x00000000	/* DENALI_PHY_285_DATA */
+		0x00000000	/* DENALI_PHY_286_DATA */
+		0x00000000	/* DENALI_PHY_287_DATA */
+		0x00000000	/* DENALI_PHY_288_DATA */
+		0x00200000	/* DENALI_PHY_289_DATA */
+		0x00000000	/* DENALI_PHY_290_DATA */
+		0x00000000	/* DENALI_PHY_291_DATA */
+		0x00000000	/* DENALI_PHY_292_DATA */
+		0x00000000	/* DENALI_PHY_293_DATA */
+		0x00000000	/* DENALI_PHY_294_DATA */
+		0x00000000	/* DENALI_PHY_295_DATA */
+		0x02800280	/* DENALI_PHY_296_DATA */
+		0x02800280	/* DENALI_PHY_297_DATA */
+		0x02800280	/* DENALI_PHY_298_DATA */
+		0x02800280	/* DENALI_PHY_299_DATA */
+		0x00000280	/* DENALI_PHY_300_DATA */
+		0x00000000	/* DENALI_PHY_301_DATA */
+		0x00000000	/* DENALI_PHY_302_DATA */
+		0x00000000	/* DENALI_PHY_303_DATA */
+		0x00000000	/* DENALI_PHY_304_DATA */
+		0x00000000	/* DENALI_PHY_305_DATA */
+		0x00800080	/* DENALI_PHY_306_DATA */
+		0x00800080	/* DENALI_PHY_307_DATA */
+		0x00800080	/* DENALI_PHY_308_DATA */
+		0x00800080	/* DENALI_PHY_309_DATA */
+		0x00800080	/* DENALI_PHY_310_DATA */
+		0x00800080	/* DENALI_PHY_311_DATA */
+		0x00800080	/* DENALI_PHY_312_DATA */
+		0x00800080	/* DENALI_PHY_313_DATA */
+		0x00800080	/* DENALI_PHY_314_DATA */
+		0x000100da	/* DENALI_PHY_315_DATA */
+		0x01ff0010	/* DENALI_PHY_316_DATA */
+		0x00000000	/* DENALI_PHY_317_DATA */
+		0x00000000	/* DENALI_PHY_318_DATA */
+		0x00000002	/* DENALI_PHY_319_DATA */
+		0x51313152	/* DENALI_PHY_320_DATA */
+		0x80013130	/* DENALI_PHY_321_DATA */
+		0x02000080	/* DENALI_PHY_322_DATA */
+		0x00100001	/* DENALI_PHY_323_DATA */
+		0x0c064208	/* DENALI_PHY_324_DATA */
+		0x000f0c0f	/* DENALI_PHY_325_DATA */
+		0x01000140	/* DENALI_PHY_326_DATA */
+		0x0000000c	/* DENALI_PHY_327_DATA */
+		0x00000000	/* DENALI_PHY_328_DATA */
+		0x00000000	/* DENALI_PHY_329_DATA */
+		0x00000000	/* DENALI_PHY_330_DATA */
+		0x00000000	/* DENALI_PHY_331_DATA */
+		0x00000000	/* DENALI_PHY_332_DATA */
+		0x00000000	/* DENALI_PHY_333_DATA */
+		0x00000000	/* DENALI_PHY_334_DATA */
+		0x00000000	/* DENALI_PHY_335_DATA */
+		0x00000000	/* DENALI_PHY_336_DATA */
+		0x00000000	/* DENALI_PHY_337_DATA */
+		0x00000000	/* DENALI_PHY_338_DATA */
+		0x00000000	/* DENALI_PHY_339_DATA */
+		0x00000000	/* DENALI_PHY_340_DATA */
+		0x00000000	/* DENALI_PHY_341_DATA */
+		0x00000000	/* DENALI_PHY_342_DATA */
+		0x00000000	/* DENALI_PHY_343_DATA */
+		0x00000000	/* DENALI_PHY_344_DATA */
+		0x00000000	/* DENALI_PHY_345_DATA */
+		0x00000000	/* DENALI_PHY_346_DATA */
+		0x00000000	/* DENALI_PHY_347_DATA */
+		0x00000000	/* DENALI_PHY_348_DATA */
+		0x00000000	/* DENALI_PHY_349_DATA */
+		0x00000000	/* DENALI_PHY_350_DATA */
+		0x00000000	/* DENALI_PHY_351_DATA */
+		0x00000000	/* DENALI_PHY_352_DATA */
+		0x00000000	/* DENALI_PHY_353_DATA */
+		0x00000000	/* DENALI_PHY_354_DATA */
+		0x00000000	/* DENALI_PHY_355_DATA */
+		0x00000000	/* DENALI_PHY_356_DATA */
+		0x00000000	/* DENALI_PHY_357_DATA */
+		0x00000000	/* DENALI_PHY_358_DATA */
+		0x00000000	/* DENALI_PHY_359_DATA */
+		0x00000000	/* DENALI_PHY_360_DATA */
+		0x00000000	/* DENALI_PHY_361_DATA */
+		0x00000000	/* DENALI_PHY_362_DATA */
+		0x00000000	/* DENALI_PHY_363_DATA */
+		0x00000000	/* DENALI_PHY_364_DATA */
+		0x00000000	/* DENALI_PHY_365_DATA */
+		0x00000000	/* DENALI_PHY_366_DATA */
+		0x00000000	/* DENALI_PHY_367_DATA */
+		0x00000000	/* DENALI_PHY_368_DATA */
+		0x00000000	/* DENALI_PHY_369_DATA */
+		0x00000000	/* DENALI_PHY_370_DATA */
+		0x00000000	/* DENALI_PHY_371_DATA */
+		0x00000000	/* DENALI_PHY_372_DATA */
+		0x00000000	/* DENALI_PHY_373_DATA */
+		0x00000000	/* DENALI_PHY_374_DATA */
+		0x00000000	/* DENALI_PHY_375_DATA */
+		0x00000000	/* DENALI_PHY_376_DATA */
+		0x00000000	/* DENALI_PHY_377_DATA */
+		0x00000000	/* DENALI_PHY_378_DATA */
+		0x00000000	/* DENALI_PHY_379_DATA */
+		0x00000000	/* DENALI_PHY_380_DATA */
+		0x00000000	/* DENALI_PHY_381_DATA */
+		0x00000000	/* DENALI_PHY_382_DATA */
+		0x00000000	/* DENALI_PHY_383_DATA */
+		0x37651240	/* DENALI_PHY_384_DATA */
+		0x0004c008	/* DENALI_PHY_385_DATA */
+		0x000000da	/* DENALI_PHY_386_DATA */
+		0x00000000	/* DENALI_PHY_387_DATA */
+		0x00000000	/* DENALI_PHY_388_DATA */
+		0x00010000	/* DENALI_PHY_389_DATA */
+		0x01DDDD90	/* DENALI_PHY_390_DATA */
+		0x01DDDD90	/* DENALI_PHY_391_DATA */
+		0x01030001	/* DENALI_PHY_392_DATA */
+		0x01000000	/* DENALI_PHY_393_DATA */
+		0x00c00000	/* DENALI_PHY_394_DATA */
+		0x00000007	/* DENALI_PHY_395_DATA */
+		0x00000000	/* DENALI_PHY_396_DATA */
+		0x00000000	/* DENALI_PHY_397_DATA */
+		0x04000408	/* DENALI_PHY_398_DATA */
+		0x00000408	/* DENALI_PHY_399_DATA */
+		0x00e4e400	/* DENALI_PHY_400_DATA */
+		0x00000000	/* DENALI_PHY_401_DATA */
+		0x00000000	/* DENALI_PHY_402_DATA */
+		0x00000000	/* DENALI_PHY_403_DATA */
+		0x00000000	/* DENALI_PHY_404_DATA */
+		0x00000000	/* DENALI_PHY_405_DATA */
+		0x00000000	/* DENALI_PHY_406_DATA */
+		0x00000000	/* DENALI_PHY_407_DATA */
+		0x00000000	/* DENALI_PHY_408_DATA */
+		0x00000000	/* DENALI_PHY_409_DATA */
+		0x00000000	/* DENALI_PHY_410_DATA */
+		0x00000000	/* DENALI_PHY_411_DATA */
+		0x00000000	/* DENALI_PHY_412_DATA */
+		0x00000000	/* DENALI_PHY_413_DATA */
+		0x00000000	/* DENALI_PHY_414_DATA */
+		0x00000000	/* DENALI_PHY_415_DATA */
+		0x00000000	/* DENALI_PHY_416_DATA */
+		0x00200000	/* DENALI_PHY_417_DATA */
+		0x00000000	/* DENALI_PHY_418_DATA */
+		0x00000000	/* DENALI_PHY_419_DATA */
+		0x00000000	/* DENALI_PHY_420_DATA */
+		0x00000000	/* DENALI_PHY_421_DATA */
+		0x00000000	/* DENALI_PHY_422_DATA */
+		0x00000000	/* DENALI_PHY_423_DATA */
+		0x02800280	/* DENALI_PHY_424_DATA */
+		0x02800280	/* DENALI_PHY_425_DATA */
+		0x02800280	/* DENALI_PHY_426_DATA */
+		0x02800280	/* DENALI_PHY_427_DATA */
+		0x00000280	/* DENALI_PHY_428_DATA */
+		0x00000000	/* DENALI_PHY_429_DATA */
+		0x00000000	/* DENALI_PHY_430_DATA */
+		0x00000000	/* DENALI_PHY_431_DATA */
+		0x00000000	/* DENALI_PHY_432_DATA */
+		0x00000000	/* DENALI_PHY_433_DATA */
+		0x00800080	/* DENALI_PHY_434_DATA */
+		0x00800080	/* DENALI_PHY_435_DATA */
+		0x00800080	/* DENALI_PHY_436_DATA */
+		0x00800080	/* DENALI_PHY_437_DATA */
+		0x00800080	/* DENALI_PHY_438_DATA */
+		0x00800080	/* DENALI_PHY_439_DATA */
+		0x00800080	/* DENALI_PHY_440_DATA */
+		0x00800080	/* DENALI_PHY_441_DATA */
+		0x00800080	/* DENALI_PHY_442_DATA */
+		0x000100da	/* DENALI_PHY_443_DATA */
+		0x01ff0010	/* DENALI_PHY_444_DATA */
+		0x00000000	/* DENALI_PHY_445_DATA */
+		0x00000000	/* DENALI_PHY_446_DATA */
+		0x00000002	/* DENALI_PHY_447_DATA */
+		0x51313152	/* DENALI_PHY_448_DATA */
+		0x80013130	/* DENALI_PHY_449_DATA */
+		0x02000080	/* DENALI_PHY_450_DATA */
+		0x00100001	/* DENALI_PHY_451_DATA */
+		0x0c064208	/* DENALI_PHY_452_DATA */
+		0x000f0c0f	/* DENALI_PHY_453_DATA */
+		0x01000140	/* DENALI_PHY_454_DATA */
+		0x0000000c	/* DENALI_PHY_455_DATA */
+		0x00000000	/* DENALI_PHY_456_DATA */
+		0x00000000	/* DENALI_PHY_457_DATA */
+		0x00000000	/* DENALI_PHY_458_DATA */
+		0x00000000	/* DENALI_PHY_459_DATA */
+		0x00000000	/* DENALI_PHY_460_DATA */
+		0x00000000	/* DENALI_PHY_461_DATA */
+		0x00000000	/* DENALI_PHY_462_DATA */
+		0x00000000	/* DENALI_PHY_463_DATA */
+		0x00000000	/* DENALI_PHY_464_DATA */
+		0x00000000	/* DENALI_PHY_465_DATA */
+		0x00000000	/* DENALI_PHY_466_DATA */
+		0x00000000	/* DENALI_PHY_467_DATA */
+		0x00000000	/* DENALI_PHY_468_DATA */
+		0x00000000	/* DENALI_PHY_469_DATA */
+		0x00000000	/* DENALI_PHY_470_DATA */
+		0x00000000	/* DENALI_PHY_471_DATA */
+		0x00000000	/* DENALI_PHY_472_DATA */
+		0x00000000	/* DENALI_PHY_473_DATA */
+		0x00000000	/* DENALI_PHY_474_DATA */
+		0x00000000	/* DENALI_PHY_475_DATA */
+		0x00000000	/* DENALI_PHY_476_DATA */
+		0x00000000	/* DENALI_PHY_477_DATA */
+		0x00000000	/* DENALI_PHY_478_DATA */
+		0x00000000	/* DENALI_PHY_479_DATA */
+		0x00000000	/* DENALI_PHY_480_DATA */
+		0x00000000	/* DENALI_PHY_481_DATA */
+		0x00000000	/* DENALI_PHY_482_DATA */
+		0x00000000	/* DENALI_PHY_483_DATA */
+		0x00000000	/* DENALI_PHY_484_DATA */
+		0x00000000	/* DENALI_PHY_485_DATA */
+		0x00000000	/* DENALI_PHY_486_DATA */
+		0x00000000	/* DENALI_PHY_487_DATA */
+		0x00000000	/* DENALI_PHY_488_DATA */
+		0x00000000	/* DENALI_PHY_489_DATA */
+		0x00000000	/* DENALI_PHY_490_DATA */
+		0x00000000	/* DENALI_PHY_491_DATA */
+		0x00000000	/* DENALI_PHY_492_DATA */
+		0x00000000	/* DENALI_PHY_493_DATA */
+		0x00000000	/* DENALI_PHY_494_DATA */
+		0x00000000	/* DENALI_PHY_495_DATA */
+		0x00000000	/* DENALI_PHY_496_DATA */
+		0x00000000	/* DENALI_PHY_497_DATA */
+		0x00000000	/* DENALI_PHY_498_DATA */
+		0x00000000	/* DENALI_PHY_499_DATA */
+		0x00000000	/* DENALI_PHY_500_DATA */
+		0x00000000	/* DENALI_PHY_501_DATA */
+		0x00000000	/* DENALI_PHY_502_DATA */
+		0x00000000	/* DENALI_PHY_503_DATA */
+		0x00000000	/* DENALI_PHY_504_DATA */
+		0x00000000	/* DENALI_PHY_505_DATA */
+		0x00000000	/* DENALI_PHY_506_DATA */
+		0x00000000	/* DENALI_PHY_507_DATA */
+		0x00000000	/* DENALI_PHY_508_DATA */
+		0x00000000	/* DENALI_PHY_509_DATA */
+		0x00000000	/* DENALI_PHY_510_DATA */
+		0x00000000	/* DENALI_PHY_511_DATA */
+		0x34216750	/* DENALI_PHY_512_DATA */
+		0x0004c008	/* DENALI_PHY_513_DATA */
+		0x000000da	/* DENALI_PHY_514_DATA */
+		0x00000000	/* DENALI_PHY_515_DATA */
+		0x00000000	/* DENALI_PHY_516_DATA */
+		0x00010000	/* DENALI_PHY_517_DATA */
+		0x01DDDD90	/* DENALI_PHY_518_DATA */
+		0x01DDDD90	/* DENALI_PHY_519_DATA */
+		0x01030001	/* DENALI_PHY_520_DATA */
+		0x01000000	/* DENALI_PHY_521_DATA */
+		0x00c00000	/* DENALI_PHY_522_DATA */
+		0x00000007	/* DENALI_PHY_523_DATA */
+		0x00000000	/* DENALI_PHY_524_DATA */
+		0x00000000	/* DENALI_PHY_525_DATA */
+		0x04000408	/* DENALI_PHY_526_DATA */
+		0x00000408	/* DENALI_PHY_527_DATA */
+		0x00e4e400	/* DENALI_PHY_528_DATA */
+		0x00000000	/* DENALI_PHY_529_DATA */
+		0x00000000	/* DENALI_PHY_530_DATA */
+		0x00000000	/* DENALI_PHY_531_DATA */
+		0x00000000	/* DENALI_PHY_532_DATA */
+		0x00000000	/* DENALI_PHY_533_DATA */
+		0x00000000	/* DENALI_PHY_534_DATA */
+		0x00000000	/* DENALI_PHY_535_DATA */
+		0x00000000	/* DENALI_PHY_536_DATA */
+		0x00000000	/* DENALI_PHY_537_DATA */
+		0x00000000	/* DENALI_PHY_538_DATA */
+		0x00000000	/* DENALI_PHY_539_DATA */
+		0x00000000	/* DENALI_PHY_540_DATA */
+		0x00000000	/* DENALI_PHY_541_DATA */
+		0x00000000	/* DENALI_PHY_542_DATA */
+		0x00000000	/* DENALI_PHY_543_DATA */
+		0x00000000	/* DENALI_PHY_544_DATA */
+		0x00200000	/* DENALI_PHY_545_DATA */
+		0x00000000	/* DENALI_PHY_546_DATA */
+		0x00000000	/* DENALI_PHY_547_DATA */
+		0x00000000	/* DENALI_PHY_548_DATA */
+		0x00000000	/* DENALI_PHY_549_DATA */
+		0x00000000	/* DENALI_PHY_550_DATA */
+		0x00000000	/* DENALI_PHY_551_DATA */
+		0x02800280	/* DENALI_PHY_552_DATA */
+		0x02800280	/* DENALI_PHY_553_DATA */
+		0x02800280	/* DENALI_PHY_554_DATA */
+		0x02800280	/* DENALI_PHY_555_DATA */
+		0x00000280	/* DENALI_PHY_556_DATA */
+		0x00000000	/* DENALI_PHY_557_DATA */
+		0x00000000	/* DENALI_PHY_558_DATA */
+		0x00000000	/* DENALI_PHY_559_DATA */
+		0x00000000	/* DENALI_PHY_560_DATA */
+		0x00000000	/* DENALI_PHY_561_DATA */
+		0x00800080	/* DENALI_PHY_562_DATA */
+		0x00800080	/* DENALI_PHY_563_DATA */
+		0x00800080	/* DENALI_PHY_564_DATA */
+		0x00800080	/* DENALI_PHY_565_DATA */
+		0x00800080	/* DENALI_PHY_566_DATA */
+		0x00800080	/* DENALI_PHY_567_DATA */
+		0x00800080	/* DENALI_PHY_568_DATA */
+		0x00800080	/* DENALI_PHY_569_DATA */
+		0x00800080	/* DENALI_PHY_570_DATA */
+		0x000100da	/* DENALI_PHY_571_DATA */
+		0x01ff0010	/* DENALI_PHY_572_DATA */
+		0x00000000	/* DENALI_PHY_573_DATA */
+		0x00000000	/* DENALI_PHY_574_DATA */
+		0x00000002	/* DENALI_PHY_575_DATA */
+		0x51313152	/* DENALI_PHY_576_DATA */
+		0x80013130	/* DENALI_PHY_577_DATA */
+		0x02000080	/* DENALI_PHY_578_DATA */
+		0x00100001	/* DENALI_PHY_579_DATA */
+		0x0c064208	/* DENALI_PHY_580_DATA */
+		0x000f0c0f	/* DENALI_PHY_581_DATA */
+		0x01000140	/* DENALI_PHY_582_DATA */
+		0x0000000c	/* DENALI_PHY_583_DATA */
+		0x00000000	/* DENALI_PHY_584_DATA */
+		0x00000000	/* DENALI_PHY_585_DATA */
+		0x00000000	/* DENALI_PHY_586_DATA */
+		0x00000000	/* DENALI_PHY_587_DATA */
+		0x00000000	/* DENALI_PHY_588_DATA */
+		0x00000000	/* DENALI_PHY_589_DATA */
+		0x00000000	/* DENALI_PHY_590_DATA */
+		0x00000000	/* DENALI_PHY_591_DATA */
+		0x00000000	/* DENALI_PHY_592_DATA */
+		0x00000000	/* DENALI_PHY_593_DATA */
+		0x00000000	/* DENALI_PHY_594_DATA */
+		0x00000000	/* DENALI_PHY_595_DATA */
+		0x00000000	/* DENALI_PHY_596_DATA */
+		0x00000000	/* DENALI_PHY_597_DATA */
+		0x00000000	/* DENALI_PHY_598_DATA */
+		0x00000000	/* DENALI_PHY_599_DATA */
+		0x00000000	/* DENALI_PHY_600_DATA */
+		0x00000000	/* DENALI_PHY_601_DATA */
+		0x00000000	/* DENALI_PHY_602_DATA */
+		0x00000000	/* DENALI_PHY_603_DATA */
+		0x00000000	/* DENALI_PHY_604_DATA */
+		0x00000000	/* DENALI_PHY_605_DATA */
+		0x00000000	/* DENALI_PHY_606_DATA */
+		0x00000000	/* DENALI_PHY_607_DATA */
+		0x00000000	/* DENALI_PHY_608_DATA */
+		0x00000000	/* DENALI_PHY_609_DATA */
+		0x00000000	/* DENALI_PHY_610_DATA */
+		0x00000000	/* DENALI_PHY_611_DATA */
+		0x00000000	/* DENALI_PHY_612_DATA */
+		0x00000000	/* DENALI_PHY_613_DATA */
+		0x00000000	/* DENALI_PHY_614_DATA */
+		0x00000000	/* DENALI_PHY_615_DATA */
+		0x00000000	/* DENALI_PHY_616_DATA */
+		0x00000000	/* DENALI_PHY_617_DATA */
+		0x00000000	/* DENALI_PHY_618_DATA */
+		0x00000000	/* DENALI_PHY_619_DATA */
+		0x00000000	/* DENALI_PHY_620_DATA */
+		0x00000000	/* DENALI_PHY_621_DATA */
+		0x00000000	/* DENALI_PHY_622_DATA */
+		0x00000000	/* DENALI_PHY_623_DATA */
+		0x00000000	/* DENALI_PHY_624_DATA */
+		0x00000000	/* DENALI_PHY_625_DATA */
+		0x00000000	/* DENALI_PHY_626_DATA */
+		0x00000000	/* DENALI_PHY_627_DATA */
+		0x00000000	/* DENALI_PHY_628_DATA */
+		0x00000000	/* DENALI_PHY_629_DATA */
+		0x00000000	/* DENALI_PHY_630_DATA */
+		0x00000000	/* DENALI_PHY_631_DATA */
+		0x00000000	/* DENALI_PHY_632_DATA */
+		0x00000000	/* DENALI_PHY_633_DATA */
+		0x00000000	/* DENALI_PHY_634_DATA */
+		0x00000000	/* DENALI_PHY_635_DATA */
+		0x00000000	/* DENALI_PHY_636_DATA */
+		0x00000000	/* DENALI_PHY_637_DATA */
+		0x00000000	/* DENALI_PHY_638_DATA */
+		0x00000000	/* DENALI_PHY_639_DATA */
+		0x35176402	/* DENALI_PHY_640_DATA */
+		0x0004c008	/* DENALI_PHY_641_DATA */
+		0x000000da	/* DENALI_PHY_642_DATA */
+		0x00000000	/* DENALI_PHY_643_DATA */
+		0x00000000	/* DENALI_PHY_644_DATA */
+		0x00010000	/* DENALI_PHY_645_DATA */
+		0x01DDDD90	/* DENALI_PHY_646_DATA */
+		0x01DDDD90	/* DENALI_PHY_647_DATA */
+		0x01030001	/* DENALI_PHY_648_DATA */
+		0x01000000	/* DENALI_PHY_649_DATA */
+		0x00c00000	/* DENALI_PHY_650_DATA */
+		0x00000007	/* DENALI_PHY_651_DATA */
+		0x00000000	/* DENALI_PHY_652_DATA */
+		0x00000000	/* DENALI_PHY_653_DATA */
+		0x04000408	/* DENALI_PHY_654_DATA */
+		0x00000408	/* DENALI_PHY_655_DATA */
+		0x00e4e400	/* DENALI_PHY_656_DATA */
+		0x00000000	/* DENALI_PHY_657_DATA */
+		0x00000000	/* DENALI_PHY_658_DATA */
+		0x00000000	/* DENALI_PHY_659_DATA */
+		0x00000000	/* DENALI_PHY_660_DATA */
+		0x00000000	/* DENALI_PHY_661_DATA */
+		0x00000000	/* DENALI_PHY_662_DATA */
+		0x00000000	/* DENALI_PHY_663_DATA */
+		0x00000000	/* DENALI_PHY_664_DATA */
+		0x00000000	/* DENALI_PHY_665_DATA */
+		0x00000000	/* DENALI_PHY_666_DATA */
+		0x00000000	/* DENALI_PHY_667_DATA */
+		0x00000000	/* DENALI_PHY_668_DATA */
+		0x00000000	/* DENALI_PHY_669_DATA */
+		0x00000000	/* DENALI_PHY_670_DATA */
+		0x00000000	/* DENALI_PHY_671_DATA */
+		0x00000000	/* DENALI_PHY_672_DATA */
+		0x00200000	/* DENALI_PHY_673_DATA */
+		0x00000000	/* DENALI_PHY_674_DATA */
+		0x00000000	/* DENALI_PHY_675_DATA */
+		0x00000000	/* DENALI_PHY_676_DATA */
+		0x00000000	/* DENALI_PHY_677_DATA */
+		0x00000000	/* DENALI_PHY_678_DATA */
+		0x00000000	/* DENALI_PHY_679_DATA */
+		0x02800280	/* DENALI_PHY_680_DATA */
+		0x02800280	/* DENALI_PHY_681_DATA */
+		0x02800280	/* DENALI_PHY_682_DATA */
+		0x02800280	/* DENALI_PHY_683_DATA */
+		0x00000280	/* DENALI_PHY_684_DATA */
+		0x00000000	/* DENALI_PHY_685_DATA */
+		0x00000000	/* DENALI_PHY_686_DATA */
+		0x00000000	/* DENALI_PHY_687_DATA */
+		0x00000000	/* DENALI_PHY_688_DATA */
+		0x00000000	/* DENALI_PHY_689_DATA */
+		0x00800080	/* DENALI_PHY_690_DATA */
+		0x00800080	/* DENALI_PHY_691_DATA */
+		0x00800080	/* DENALI_PHY_692_DATA */
+		0x00800080	/* DENALI_PHY_693_DATA */
+		0x00800080	/* DENALI_PHY_694_DATA */
+		0x00800080	/* DENALI_PHY_695_DATA */
+		0x00800080	/* DENALI_PHY_696_DATA */
+		0x00800080	/* DENALI_PHY_697_DATA */
+		0x00800080	/* DENALI_PHY_698_DATA */
+		0x000100da	/* DENALI_PHY_699_DATA */
+		0x01ff0010	/* DENALI_PHY_700_DATA */
+		0x00000000	/* DENALI_PHY_701_DATA */
+		0x00000000	/* DENALI_PHY_702_DATA */
+		0x00000002	/* DENALI_PHY_703_DATA */
+		0x51313152	/* DENALI_PHY_704_DATA */
+		0x80013130	/* DENALI_PHY_705_DATA */
+		0x02000080	/* DENALI_PHY_706_DATA */
+		0x00100001	/* DENALI_PHY_707_DATA */
+		0x0c064208	/* DENALI_PHY_708_DATA */
+		0x000f0c0f	/* DENALI_PHY_709_DATA */
+		0x01000140	/* DENALI_PHY_710_DATA */
+		0x0000000c	/* DENALI_PHY_711_DATA */
+		0x00000000	/* DENALI_PHY_712_DATA */
+		0x00000000	/* DENALI_PHY_713_DATA */
+		0x00000000	/* DENALI_PHY_714_DATA */
+		0x00000000	/* DENALI_PHY_715_DATA */
+		0x00000000	/* DENALI_PHY_716_DATA */
+		0x00000000	/* DENALI_PHY_717_DATA */
+		0x00000000	/* DENALI_PHY_718_DATA */
+		0x00000000	/* DENALI_PHY_719_DATA */
+		0x00000000	/* DENALI_PHY_720_DATA */
+		0x00000000	/* DENALI_PHY_721_DATA */
+		0x00000000	/* DENALI_PHY_722_DATA */
+		0x00000000	/* DENALI_PHY_723_DATA */
+		0x00000000	/* DENALI_PHY_724_DATA */
+		0x00000000	/* DENALI_PHY_725_DATA */
+		0x00000000	/* DENALI_PHY_726_DATA */
+		0x00000000	/* DENALI_PHY_727_DATA */
+		0x00000000	/* DENALI_PHY_728_DATA */
+		0x00000000	/* DENALI_PHY_729_DATA */
+		0x00000000	/* DENALI_PHY_730_DATA */
+		0x00000000	/* DENALI_PHY_731_DATA */
+		0x00000000	/* DENALI_PHY_732_DATA */
+		0x00000000	/* DENALI_PHY_733_DATA */
+		0x00000000	/* DENALI_PHY_734_DATA */
+		0x00000000	/* DENALI_PHY_735_DATA */
+		0x00000000	/* DENALI_PHY_736_DATA */
+		0x00000000	/* DENALI_PHY_737_DATA */
+		0x00000000	/* DENALI_PHY_738_DATA */
+		0x00000000	/* DENALI_PHY_739_DATA */
+		0x00000000	/* DENALI_PHY_740_DATA */
+		0x00000000	/* DENALI_PHY_741_DATA */
+		0x00000000	/* DENALI_PHY_742_DATA */
+		0x00000000	/* DENALI_PHY_743_DATA */
+		0x00000000	/* DENALI_PHY_744_DATA */
+		0x00000000	/* DENALI_PHY_745_DATA */
+		0x00000000	/* DENALI_PHY_746_DATA */
+		0x00000000	/* DENALI_PHY_747_DATA */
+		0x00000000	/* DENALI_PHY_748_DATA */
+		0x00000000	/* DENALI_PHY_749_DATA */
+		0x00000000	/* DENALI_PHY_750_DATA */
+		0x00000000	/* DENALI_PHY_751_DATA */
+		0x00000000	/* DENALI_PHY_752_DATA */
+		0x00000000	/* DENALI_PHY_753_DATA */
+		0x00000000	/* DENALI_PHY_754_DATA */
+		0x00000000	/* DENALI_PHY_755_DATA */
+		0x00000000	/* DENALI_PHY_756_DATA */
+		0x00000000	/* DENALI_PHY_757_DATA */
+		0x00000000	/* DENALI_PHY_758_DATA */
+		0x00000000	/* DENALI_PHY_759_DATA */
+		0x00000000	/* DENALI_PHY_760_DATA */
+		0x00000000	/* DENALI_PHY_761_DATA */
+		0x00000000	/* DENALI_PHY_762_DATA */
+		0x00000000	/* DENALI_PHY_763_DATA */
+		0x00000000	/* DENALI_PHY_764_DATA */
+		0x00000000	/* DENALI_PHY_765_DATA */
+		0x00000000	/* DENALI_PHY_766_DATA */
+		0x00000000	/* DENALI_PHY_767_DATA */
+		0x10526347	/* DENALI_PHY_768_DATA */
+		0x0004c008	/* DENALI_PHY_769_DATA */
+		0x000000da	/* DENALI_PHY_770_DATA */
+		0x00000000	/* DENALI_PHY_771_DATA */
+		0x00000000	/* DENALI_PHY_772_DATA */
+		0x00010000	/* DENALI_PHY_773_DATA */
+		0x01DDDD90	/* DENALI_PHY_774_DATA */
+		0x01DDDD90	/* DENALI_PHY_775_DATA */
+		0x01030001	/* DENALI_PHY_776_DATA */
+		0x01000000	/* DENALI_PHY_777_DATA */
+		0x00c00000	/* DENALI_PHY_778_DATA */
+		0x00000007	/* DENALI_PHY_779_DATA */
+		0x00000000	/* DENALI_PHY_780_DATA */
+		0x00000000	/* DENALI_PHY_781_DATA */
+		0x04000408	/* DENALI_PHY_782_DATA */
+		0x00000408	/* DENALI_PHY_783_DATA */
+		0x00e4e400	/* DENALI_PHY_784_DATA */
+		0x00000000	/* DENALI_PHY_785_DATA */
+		0x00000000	/* DENALI_PHY_786_DATA */
+		0x00000000	/* DENALI_PHY_787_DATA */
+		0x00000000	/* DENALI_PHY_788_DATA */
+		0x00000000	/* DENALI_PHY_789_DATA */
+		0x00000000	/* DENALI_PHY_790_DATA */
+		0x00000000	/* DENALI_PHY_791_DATA */
+		0x00000000	/* DENALI_PHY_792_DATA */
+		0x00000000	/* DENALI_PHY_793_DATA */
+		0x00000000	/* DENALI_PHY_794_DATA */
+		0x00000000	/* DENALI_PHY_795_DATA */
+		0x00000000	/* DENALI_PHY_796_DATA */
+		0x00000000	/* DENALI_PHY_797_DATA */
+		0x00000000	/* DENALI_PHY_798_DATA */
+		0x00000000	/* DENALI_PHY_799_DATA */
+		0x00000000	/* DENALI_PHY_800_DATA */
+		0x00200000	/* DENALI_PHY_801_DATA */
+		0x00000000	/* DENALI_PHY_802_DATA */
+		0x00000000	/* DENALI_PHY_803_DATA */
+		0x00000000	/* DENALI_PHY_804_DATA */
+		0x00000000	/* DENALI_PHY_805_DATA */
+		0x00000000	/* DENALI_PHY_806_DATA */
+		0x00000000	/* DENALI_PHY_807_DATA */
+		0x02800280	/* DENALI_PHY_808_DATA */
+		0x02800280	/* DENALI_PHY_809_DATA */
+		0x02800280	/* DENALI_PHY_810_DATA */
+		0x02800280	/* DENALI_PHY_811_DATA */
+		0x00000280	/* DENALI_PHY_812_DATA */
+		0x00000000	/* DENALI_PHY_813_DATA */
+		0x00000000	/* DENALI_PHY_814_DATA */
+		0x00000000	/* DENALI_PHY_815_DATA */
+		0x00000000	/* DENALI_PHY_816_DATA */
+		0x00000000	/* DENALI_PHY_817_DATA */
+		0x00800080	/* DENALI_PHY_818_DATA */
+		0x00800080	/* DENALI_PHY_819_DATA */
+		0x00800080	/* DENALI_PHY_820_DATA */
+		0x00800080	/* DENALI_PHY_821_DATA */
+		0x00800080	/* DENALI_PHY_822_DATA */
+		0x00800080	/* DENALI_PHY_823_DATA */
+		0x00800080	/* DENALI_PHY_824_DATA */
+		0x00800080	/* DENALI_PHY_825_DATA */
+		0x00800080	/* DENALI_PHY_826_DATA */
+		0x000100da	/* DENALI_PHY_827_DATA */
+		0x01ff0010	/* DENALI_PHY_828_DATA */
+		0x00000000	/* DENALI_PHY_829_DATA */
+		0x00000000	/* DENALI_PHY_830_DATA */
+		0x00000002	/* DENALI_PHY_831_DATA */
+		0x51313152	/* DENALI_PHY_832_DATA */
+		0x80013130	/* DENALI_PHY_833_DATA */
+		0x02000080	/* DENALI_PHY_834_DATA */
+		0x00100001	/* DENALI_PHY_835_DATA */
+		0x0c064208	/* DENALI_PHY_836_DATA */
+		0x000f0c0f	/* DENALI_PHY_837_DATA */
+		0x01000140	/* DENALI_PHY_838_DATA */
+		0x0000000c	/* DENALI_PHY_839_DATA */
+		0x00000000	/* DENALI_PHY_840_DATA */
+		0x00000000	/* DENALI_PHY_841_DATA */
+		0x00000000	/* DENALI_PHY_842_DATA */
+		0x00000000	/* DENALI_PHY_843_DATA */
+		0x00000000	/* DENALI_PHY_844_DATA */
+		0x00000000	/* DENALI_PHY_845_DATA */
+		0x00000000	/* DENALI_PHY_846_DATA */
+		0x00000000	/* DENALI_PHY_847_DATA */
+		0x00000000	/* DENALI_PHY_848_DATA */
+		0x00000000	/* DENALI_PHY_849_DATA */
+		0x00000000	/* DENALI_PHY_850_DATA */
+		0x00000000	/* DENALI_PHY_851_DATA */
+		0x00000000	/* DENALI_PHY_852_DATA */
+		0x00000000	/* DENALI_PHY_853_DATA */
+		0x00000000	/* DENALI_PHY_854_DATA */
+		0x00000000	/* DENALI_PHY_855_DATA */
+		0x00000000	/* DENALI_PHY_856_DATA */
+		0x00000000	/* DENALI_PHY_857_DATA */
+		0x00000000	/* DENALI_PHY_858_DATA */
+		0x00000000	/* DENALI_PHY_859_DATA */
+		0x00000000	/* DENALI_PHY_860_DATA */
+		0x00000000	/* DENALI_PHY_861_DATA */
+		0x00000000	/* DENALI_PHY_862_DATA */
+		0x00000000	/* DENALI_PHY_863_DATA */
+		0x00000000	/* DENALI_PHY_864_DATA */
+		0x00000000	/* DENALI_PHY_865_DATA */
+		0x00000000	/* DENALI_PHY_866_DATA */
+		0x00000000	/* DENALI_PHY_867_DATA */
+		0x00000000	/* DENALI_PHY_868_DATA */
+		0x00000000	/* DENALI_PHY_869_DATA */
+		0x00000000	/* DENALI_PHY_870_DATA */
+		0x00000000	/* DENALI_PHY_871_DATA */
+		0x00000000	/* DENALI_PHY_872_DATA */
+		0x00000000	/* DENALI_PHY_873_DATA */
+		0x00000000	/* DENALI_PHY_874_DATA */
+		0x00000000	/* DENALI_PHY_875_DATA */
+		0x00000000	/* DENALI_PHY_876_DATA */
+		0x00000000	/* DENALI_PHY_877_DATA */
+		0x00000000	/* DENALI_PHY_878_DATA */
+		0x00000000	/* DENALI_PHY_879_DATA */
+		0x00000000	/* DENALI_PHY_880_DATA */
+		0x00000000	/* DENALI_PHY_881_DATA */
+		0x00000000	/* DENALI_PHY_882_DATA */
+		0x00000000	/* DENALI_PHY_883_DATA */
+		0x00000000	/* DENALI_PHY_884_DATA */
+		0x00000000	/* DENALI_PHY_885_DATA */
+		0x00000000	/* DENALI_PHY_886_DATA */
+		0x00000000	/* DENALI_PHY_887_DATA */
+		0x00000000	/* DENALI_PHY_888_DATA */
+		0x00000000	/* DENALI_PHY_889_DATA */
+		0x00000000	/* DENALI_PHY_890_DATA */
+		0x00000000	/* DENALI_PHY_891_DATA */
+		0x00000000	/* DENALI_PHY_892_DATA */
+		0x00000000	/* DENALI_PHY_893_DATA */
+		0x00000000	/* DENALI_PHY_894_DATA */
+		0x00000000	/* DENALI_PHY_895_DATA */
+		0x41753260	/* DENALI_PHY_896_DATA */
+		0x0004c008	/* DENALI_PHY_897_DATA */
+		0x000000da	/* DENALI_PHY_898_DATA */
+		0x00000000	/* DENALI_PHY_899_DATA */
+		0x00000000	/* DENALI_PHY_900_DATA */
+		0x00010000	/* DENALI_PHY_901_DATA */
+		0x01DDDD90	/* DENALI_PHY_902_DATA */
+		0x01DDDD90	/* DENALI_PHY_903_DATA */
+		0x01030001	/* DENALI_PHY_904_DATA */
+		0x01000000	/* DENALI_PHY_905_DATA */
+		0x00c00000	/* DENALI_PHY_906_DATA */
+		0x00000007	/* DENALI_PHY_907_DATA */
+		0x00000000	/* DENALI_PHY_908_DATA */
+		0x00000000	/* DENALI_PHY_909_DATA */
+		0x04000408	/* DENALI_PHY_910_DATA */
+		0x00000408	/* DENALI_PHY_911_DATA */
+		0x00e4e400	/* DENALI_PHY_912_DATA */
+		0x00000000	/* DENALI_PHY_913_DATA */
+		0x00000000	/* DENALI_PHY_914_DATA */
+		0x00000000	/* DENALI_PHY_915_DATA */
+		0x00000000	/* DENALI_PHY_916_DATA */
+		0x00000000	/* DENALI_PHY_917_DATA */
+		0x00000000	/* DENALI_PHY_918_DATA */
+		0x00000000	/* DENALI_PHY_919_DATA */
+		0x00000000	/* DENALI_PHY_920_DATA */
+		0x00000000	/* DENALI_PHY_921_DATA */
+		0x00000000	/* DENALI_PHY_922_DATA */
+		0x00000000	/* DENALI_PHY_923_DATA */
+		0x00000000	/* DENALI_PHY_924_DATA */
+		0x00000000	/* DENALI_PHY_925_DATA */
+		0x00000000	/* DENALI_PHY_926_DATA */
+		0x00000000	/* DENALI_PHY_927_DATA */
+		0x00000000	/* DENALI_PHY_928_DATA */
+		0x00200000	/* DENALI_PHY_929_DATA */
+		0x00000000	/* DENALI_PHY_930_DATA */
+		0x00000000	/* DENALI_PHY_931_DATA */
+		0x00000000	/* DENALI_PHY_932_DATA */
+		0x00000000	/* DENALI_PHY_933_DATA */
+		0x00000000	/* DENALI_PHY_934_DATA */
+		0x00000000	/* DENALI_PHY_935_DATA */
+		0x02800280	/* DENALI_PHY_936_DATA */
+		0x02800280	/* DENALI_PHY_937_DATA */
+		0x02800280	/* DENALI_PHY_938_DATA */
+		0x02800280	/* DENALI_PHY_939_DATA */
+		0x00000280	/* DENALI_PHY_940_DATA */
+		0x00000000	/* DENALI_PHY_941_DATA */
+		0x00000000	/* DENALI_PHY_942_DATA */
+		0x00000000	/* DENALI_PHY_943_DATA */
+		0x00000000	/* DENALI_PHY_944_DATA */
+		0x00000000	/* DENALI_PHY_945_DATA */
+		0x00800080	/* DENALI_PHY_946_DATA */
+		0x00800080	/* DENALI_PHY_947_DATA */
+		0x00800080	/* DENALI_PHY_948_DATA */
+		0x00800080	/* DENALI_PHY_949_DATA */
+		0x00800080	/* DENALI_PHY_950_DATA */
+		0x00800080	/* DENALI_PHY_951_DATA */
+		0x00800080	/* DENALI_PHY_952_DATA */
+		0x00800080	/* DENALI_PHY_953_DATA */
+		0x00800080	/* DENALI_PHY_954_DATA */
+		0x000100da	/* DENALI_PHY_955_DATA */
+		0x01ff0010	/* DENALI_PHY_956_DATA */
+		0x00000000	/* DENALI_PHY_957_DATA */
+		0x00000000	/* DENALI_PHY_958_DATA */
+		0x00000002	/* DENALI_PHY_959_DATA */
+		0x51313152	/* DENALI_PHY_960_DATA */
+		0x80013130	/* DENALI_PHY_961_DATA */
+		0x02000080	/* DENALI_PHY_962_DATA */
+		0x00100001	/* DENALI_PHY_963_DATA */
+		0x0c064208	/* DENALI_PHY_964_DATA */
+		0x000f0c0f	/* DENALI_PHY_965_DATA */
+		0x01000140	/* DENALI_PHY_966_DATA */
+		0x0000000c	/* DENALI_PHY_967_DATA */
+		0x00000000	/* DENALI_PHY_968_DATA */
+		0x00000000	/* DENALI_PHY_969_DATA */
+		0x00000000	/* DENALI_PHY_970_DATA */
+		0x00000000	/* DENALI_PHY_971_DATA */
+		0x00000000	/* DENALI_PHY_972_DATA */
+		0x00000000	/* DENALI_PHY_973_DATA */
+		0x00000000	/* DENALI_PHY_974_DATA */
+		0x00000000	/* DENALI_PHY_975_DATA */
+		0x00000000	/* DENALI_PHY_976_DATA */
+		0x00000000	/* DENALI_PHY_977_DATA */
+		0x00000000	/* DENALI_PHY_978_DATA */
+		0x00000000	/* DENALI_PHY_979_DATA */
+		0x00000000	/* DENALI_PHY_980_DATA */
+		0x00000000	/* DENALI_PHY_981_DATA */
+		0x00000000	/* DENALI_PHY_982_DATA */
+		0x00000000	/* DENALI_PHY_983_DATA */
+		0x00000000	/* DENALI_PHY_984_DATA */
+		0x00000000	/* DENALI_PHY_985_DATA */
+		0x00000000	/* DENALI_PHY_986_DATA */
+		0x00000000	/* DENALI_PHY_987_DATA */
+		0x00000000	/* DENALI_PHY_988_DATA */
+		0x00000000	/* DENALI_PHY_989_DATA */
+		0x00000000	/* DENALI_PHY_990_DATA */
+		0x00000000	/* DENALI_PHY_991_DATA */
+		0x00000000	/* DENALI_PHY_992_DATA */
+		0x00000000	/* DENALI_PHY_993_DATA */
+		0x00000000	/* DENALI_PHY_994_DATA */
+		0x00000000	/* DENALI_PHY_995_DATA */
+		0x00000000	/* DENALI_PHY_996_DATA */
+		0x00000000	/* DENALI_PHY_997_DATA */
+		0x00000000	/* DENALI_PHY_998_DATA */
+		0x00000000	/* DENALI_PHY_999_DATA */
+		0x00000000	/* DENALI_PHY_1000_DATA */
+		0x00000000	/* DENALI_PHY_1001_DATA */
+		0x00000000	/* DENALI_PHY_1002_DATA */
+		0x00000000	/* DENALI_PHY_1003_DATA */
+		0x00000000	/* DENALI_PHY_1004_DATA */
+		0x00000000	/* DENALI_PHY_1005_DATA */
+		0x00000000	/* DENALI_PHY_1006_DATA */
+		0x00000000	/* DENALI_PHY_1007_DATA */
+		0x00000000	/* DENALI_PHY_1008_DATA */
+		0x00000000	/* DENALI_PHY_1009_DATA */
+		0x00000000	/* DENALI_PHY_1010_DATA */
+		0x00000000	/* DENALI_PHY_1011_DATA */
+		0x00000000	/* DENALI_PHY_1012_DATA */
+		0x00000000	/* DENALI_PHY_1013_DATA */
+		0x00000000	/* DENALI_PHY_1014_DATA */
+		0x00000000	/* DENALI_PHY_1015_DATA */
+		0x00000000	/* DENALI_PHY_1016_DATA */
+		0x00000000	/* DENALI_PHY_1017_DATA */
+		0x00000000	/* DENALI_PHY_1018_DATA */
+		0x00000000	/* DENALI_PHY_1019_DATA */
+		0x00000000	/* DENALI_PHY_1020_DATA */
+		0x00000000	/* DENALI_PHY_1021_DATA */
+		0x00000000	/* DENALI_PHY_1022_DATA */
+		0x00000000	/* DENALI_PHY_1023_DATA */
+		0x76543210	/* DENALI_PHY_1024_DATA */
+		0x0004c008	/* DENALI_PHY_1025_DATA */
+		0x000000da	/* DENALI_PHY_1026_DATA */
+		0x00000000	/* DENALI_PHY_1027_DATA */
+		0x00000000	/* DENALI_PHY_1028_DATA */
+		0x00010000	/* DENALI_PHY_1029_DATA */
+		0x01665555	/* DENALI_PHY_1030_DATA */
+		0x01665555	/* DENALI_PHY_1031_DATA */
+		0x01030001	/* DENALI_PHY_1032_DATA */
+		0x01000000	/* DENALI_PHY_1033_DATA */
+		0x00c00000	/* DENALI_PHY_1034_DATA */
+		0x00000007	/* DENALI_PHY_1035_DATA */
+		0x00000000	/* DENALI_PHY_1036_DATA */
+		0x00000000	/* DENALI_PHY_1037_DATA */
+		0x04000408	/* DENALI_PHY_1038_DATA */
+		0x00000408	/* DENALI_PHY_1039_DATA */
+		0x00e4e400	/* DENALI_PHY_1040_DATA */
+		0x00000000	/* DENALI_PHY_1041_DATA */
+		0x00000000	/* DENALI_PHY_1042_DATA */
+		0x00000000	/* DENALI_PHY_1043_DATA */
+		0x00000000	/* DENALI_PHY_1044_DATA */
+		0x00000000	/* DENALI_PHY_1045_DATA */
+		0x00000000	/* DENALI_PHY_1046_DATA */
+		0x00000000	/* DENALI_PHY_1047_DATA */
+		0x00000000	/* DENALI_PHY_1048_DATA */
+		0x00000000	/* DENALI_PHY_1049_DATA */
+		0x00000000	/* DENALI_PHY_1050_DATA */
+		0x00000000	/* DENALI_PHY_1051_DATA */
+		0x00000000	/* DENALI_PHY_1052_DATA */
+		0x00000000	/* DENALI_PHY_1053_DATA */
+		0x00000000	/* DENALI_PHY_1054_DATA */
+		0x00000000	/* DENALI_PHY_1055_DATA */
+		0x00000000	/* DENALI_PHY_1056_DATA */
+		0x00200000	/* DENALI_PHY_1057_DATA */
+		0x00000000	/* DENALI_PHY_1058_DATA */
+		0x00000000	/* DENALI_PHY_1059_DATA */
+		0x00000000	/* DENALI_PHY_1060_DATA */
+		0x00000000	/* DENALI_PHY_1061_DATA */
+		0x00000000	/* DENALI_PHY_1062_DATA */
+		0x00000000	/* DENALI_PHY_1063_DATA */
+		0x02800280	/* DENALI_PHY_1064_DATA */
+		0x02800280	/* DENALI_PHY_1065_DATA */
+		0x02800280	/* DENALI_PHY_1066_DATA */
+		0x02800280	/* DENALI_PHY_1067_DATA */
+		0x00000280	/* DENALI_PHY_1068_DATA */
+		0x00000000	/* DENALI_PHY_1069_DATA */
+		0x00000000	/* DENALI_PHY_1070_DATA */
+		0x00000000	/* DENALI_PHY_1071_DATA */
+		0x00000000	/* DENALI_PHY_1072_DATA */
+		0x00000000	/* DENALI_PHY_1073_DATA */
+		0x00800080	/* DENALI_PHY_1074_DATA */
+		0x00800080	/* DENALI_PHY_1075_DATA */
+		0x00800080	/* DENALI_PHY_1076_DATA */
+		0x00800080	/* DENALI_PHY_1077_DATA */
+		0x00800080	/* DENALI_PHY_1078_DATA */
+		0x00800080	/* DENALI_PHY_1079_DATA */
+		0x00800080	/* DENALI_PHY_1080_DATA */
+		0x00800080	/* DENALI_PHY_1081_DATA */
+		0x00800080	/* DENALI_PHY_1082_DATA */
+		0x000100da	/* DENALI_PHY_1083_DATA */
+		0x01ff0010	/* DENALI_PHY_1084_DATA */
+		0x00000000	/* DENALI_PHY_1085_DATA */
+		0x00000000	/* DENALI_PHY_1086_DATA */
+		0x00000002	/* DENALI_PHY_1087_DATA */
+		0x51313152	/* DENALI_PHY_1088_DATA */
+		0x80013130	/* DENALI_PHY_1089_DATA */
+		0x02000080	/* DENALI_PHY_1090_DATA */
+		0x00100001	/* DENALI_PHY_1091_DATA */
+		0x0c064208	/* DENALI_PHY_1092_DATA */
+		0x000f0c0f	/* DENALI_PHY_1093_DATA */
+		0x01000140	/* DENALI_PHY_1094_DATA */
+		0x0000000c	/* DENALI_PHY_1095_DATA */
+		0x00000000	/* DENALI_PHY_1096_DATA */
+		0x00000000	/* DENALI_PHY_1097_DATA */
+		0x00000000	/* DENALI_PHY_1098_DATA */
+		0x00000000	/* DENALI_PHY_1099_DATA */
+		0x00000000	/* DENALI_PHY_1100_DATA */
+		0x00000000	/* DENALI_PHY_1101_DATA */
+		0x00000000	/* DENALI_PHY_1102_DATA */
+		0x00000000	/* DENALI_PHY_1103_DATA */
+		0x00000000	/* DENALI_PHY_1104_DATA */
+		0x00000000	/* DENALI_PHY_1105_DATA */
+		0x00000000	/* DENALI_PHY_1106_DATA */
+		0x00000000	/* DENALI_PHY_1107_DATA */
+		0x00000000	/* DENALI_PHY_1108_DATA */
+		0x00000000	/* DENALI_PHY_1109_DATA */
+		0x00000000	/* DENALI_PHY_1110_DATA */
+		0x00000000	/* DENALI_PHY_1111_DATA */
+		0x00000000	/* DENALI_PHY_1112_DATA */
+		0x00000000	/* DENALI_PHY_1113_DATA */
+		0x00000000	/* DENALI_PHY_1114_DATA */
+		0x00000000	/* DENALI_PHY_1115_DATA */
+		0x00000000	/* DENALI_PHY_1116_DATA */
+		0x00000000	/* DENALI_PHY_1117_DATA */
+		0x00000000	/* DENALI_PHY_1118_DATA */
+		0x00000000	/* DENALI_PHY_1119_DATA */
+		0x00000000	/* DENALI_PHY_1120_DATA */
+		0x00000000	/* DENALI_PHY_1121_DATA */
+		0x00000000	/* DENALI_PHY_1122_DATA */
+		0x00000000	/* DENALI_PHY_1123_DATA */
+		0x00000000	/* DENALI_PHY_1124_DATA */
+		0x00000000	/* DENALI_PHY_1125_DATA */
+		0x00000000	/* DENALI_PHY_1126_DATA */
+		0x00000000	/* DENALI_PHY_1127_DATA */
+		0x00000000	/* DENALI_PHY_1128_DATA */
+		0x00000000	/* DENALI_PHY_1129_DATA */
+		0x00000000	/* DENALI_PHY_1130_DATA */
+		0x00000000	/* DENALI_PHY_1131_DATA */
+		0x00000000	/* DENALI_PHY_1132_DATA */
+		0x00000000	/* DENALI_PHY_1133_DATA */
+		0x00000000	/* DENALI_PHY_1134_DATA */
+		0x00000000	/* DENALI_PHY_1135_DATA */
+		0x00000000	/* DENALI_PHY_1136_DATA */
+		0x00000000	/* DENALI_PHY_1137_DATA */
+		0x00000000	/* DENALI_PHY_1138_DATA */
+		0x00000000	/* DENALI_PHY_1139_DATA */
+		0x00000000	/* DENALI_PHY_1140_DATA */
+		0x00000000	/* DENALI_PHY_1141_DATA */
+		0x00000000	/* DENALI_PHY_1142_DATA */
+		0x00000000	/* DENALI_PHY_1143_DATA */
+		0x00000000	/* DENALI_PHY_1144_DATA */
+		0x00000000	/* DENALI_PHY_1145_DATA */
+		0x00000000	/* DENALI_PHY_1146_DATA */
+		0x00000000	/* DENALI_PHY_1147_DATA */
+		0x00000000	/* DENALI_PHY_1148_DATA */
+		0x00000000	/* DENALI_PHY_1149_DATA */
+		0x00000000	/* DENALI_PHY_1150_DATA */
+		0x00000000	/* DENALI_PHY_1151_DATA */
+		0x00000000	/* DENALI_PHY_1152_DATA */
+		0x00000000	/* DENALI_PHY_1153_DATA */
+		0x00050000	/* DENALI_PHY_1154_DATA */
+		0x00000000	/* DENALI_PHY_1155_DATA */
+		0x00000000	/* DENALI_PHY_1156_DATA */
+		0x00000000	/* DENALI_PHY_1157_DATA */
+		0x00000100	/* DENALI_PHY_1158_DATA */
+		0x00000000	/* DENALI_PHY_1159_DATA */
+		0x00000000	/* DENALI_PHY_1160_DATA */
+		0x00506401	/* DENALI_PHY_1161_DATA */
+		0x01221102	/* DENALI_PHY_1162_DATA */
+		0x00000122	/* DENALI_PHY_1163_DATA */
+		0x00000000	/* DENALI_PHY_1164_DATA */
+		0x000B1F00	/* DENALI_PHY_1165_DATA */
+		0x0B1F0B1F	/* DENALI_PHY_1166_DATA */
+		0x0B1F0B1F	/* DENALI_PHY_1167_DATA */
+		0x0B1F0B1F	/* DENALI_PHY_1168_DATA */
+		0x0B1F0B1F	/* DENALI_PHY_1169_DATA */
+		0x00000B00	/* DENALI_PHY_1170_DATA */
+		0x42080010	/* DENALI_PHY_1171_DATA */
+		0x01000100	/* DENALI_PHY_1172_DATA */
+		0x01000100	/* DENALI_PHY_1173_DATA */
+		0x01000100	/* DENALI_PHY_1174_DATA */
+		0x01000100	/* DENALI_PHY_1175_DATA */
+		0x00000000	/* DENALI_PHY_1176_DATA */
+		0x00000000	/* DENALI_PHY_1177_DATA */
+		0x00000000	/* DENALI_PHY_1178_DATA */
+		0x00000000	/* DENALI_PHY_1179_DATA */
+		0x00000000	/* DENALI_PHY_1180_DATA */
+		0x00000803	/* DENALI_PHY_1181_DATA */
+		0x223FFF00	/* DENALI_PHY_1182_DATA */
+		0x000008FF	/* DENALI_PHY_1183_DATA */
+		0x0000057F	/* DENALI_PHY_1184_DATA */
+		0x0000057F	/* DENALI_PHY_1185_DATA */
+		0x00037FFF	/* DENALI_PHY_1186_DATA */
+		0x00037FFF	/* DENALI_PHY_1187_DATA */
+		0x00004410	/* DENALI_PHY_1188_DATA */
+		0x00004410	/* DENALI_PHY_1189_DATA */
+		0x00004410	/* DENALI_PHY_1190_DATA */
+		0x00004410	/* DENALI_PHY_1191_DATA */
+		0x00004410	/* DENALI_PHY_1192_DATA */
+		0x00000111	/* DENALI_PHY_1193_DATA */
+		0x00000111	/* DENALI_PHY_1194_DATA */
+		0x00000000	/* DENALI_PHY_1195_DATA */
+		0x00000000	/* DENALI_PHY_1196_DATA */
+		0x00000000	/* DENALI_PHY_1197_DATA */
+		0x04000000	/* DENALI_PHY_1198_DATA */
+		0x00000000	/* DENALI_PHY_1199_DATA */
+		0x00000000	/* DENALI_PHY_1200_DATA */
+		0x00000108	/* DENALI_PHY_1201_DATA */
+		0x00000000	/* DENALI_PHY_1202_DATA */
+		0x00000000	/* DENALI_PHY_1203_DATA */
+		0x00000000	/* DENALI_PHY_1204_DATA */
+		0x00000001	/* DENALI_PHY_1205_DATA */
+		0x00000000	/* DENALI_PHY_1206_DATA */
+		0x00000000	/* DENALI_PHY_1207_DATA */
+		0x00000000	/* DENALI_PHY_1208_DATA */
+		0x00000000	/* DENALI_PHY_1209_DATA */
+		0x00000000	/* DENALI_PHY_1210_DATA */
+		0x00000000	/* DENALI_PHY_1211_DATA */
+		0x00020100	/* DENALI_PHY_1212_DATA */
+		0x00000000	/* DENALI_PHY_1213_DATA */
+		0x00000000	/* DENALI_PHY_1214_DATA */
+	>;
+};
diff --git a/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi
new file mode 100644
index 0000000000..3dcd2b4987
--- /dev/null
+++ b/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2020-2021 SiFive, Inc
+ */
+
+#include "fu740-c000-u-boot.dtsi"
+#include "fu740-hifive-unmatched-a00-ddr.dtsi"
+
+/ {
+	aliases {
+		spi0 = &spi0;
+	};
+
+	memory@80000000 {
+		u-boot,dm-spl;
+	};
+
+	hfclk {
+		u-boot,dm-spl;
+	};
+
+	rtcclk {
+		u-boot,dm-spl;
+	};
+
+};
+
+&clint {
+	clocks = <&rtcclk>;
+};
+
+&spi0 {
+	mmc@0 {
+		u-boot,dm-spl;
+	};
+};
+
+&gpio {
+	u-boot,dm-spl;
+};
diff --git a/arch/riscv/dts/hifive-unmatched-a00.dts b/arch/riscv/dts/hifive-unmatched-a00.dts
new file mode 100644
index 0000000000..b44e8c160d
--- /dev/null
+++ b/arch/riscv/dts/hifive-unmatched-a00.dts
@@ -0,0 +1,259 @@
+// SPDX-License-Identifier: GPL-2.0+
+/* Copyright (c) 2019-2021 SiFive, Inc */
+
+#include "fu740-c000.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/* Clock frequency (in Hz) of the PCB crystal for rtcclk */
+#define RTCCLK_FREQ		1000000
+
+/ {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	model = "SiFive HiFive Unmatched A00";
+	compatible = "sifive,hifive-unmatched-a00", "sifive,fu740-c000",
+		     "sifive,fu740";
+
+	chosen {
+		stdout-path = "serial0";
+	};
+
+	cpus {
+		timebase-frequency = <RTCCLK_FREQ>;
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x0 0x80000000 0x4 0x00000000>;
+	};
+
+	soc {
+	};
+
+	hfclk: hfclk {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <26000000>;
+		clock-output-names = "hfclk";
+	};
+
+	rtcclk: rtcclk {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <RTCCLK_FREQ>;
+		clock-output-names = "rtcclk";
+	};
+
+	gpio-poweroff {
+		compatible = "gpio-poweroff";
+		gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+
+	temperature-sensor@4c {
+		compatible = "ti,tmp451";
+		reg = <0x4c>;
+		interrupt-parent = <&gpio>;
+		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
+	};
+
+	pmic@58 {
+		compatible = "dlg,da9063";
+		reg = <0x58>;
+		interrupt-parent = <&gpio>;
+		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-controller;
+
+		regulators {
+			vdd_bcore1: bcore1 {
+				regulator-min-microvolt = <1050000>;
+				regulator-max-microvolt = <1050000>;
+				regulator-min-microamp = <5000000>;
+				regulator-max-microamp = <5000000>;
+				regulator-always-on;
+			};
+
+			vdd_bcore2: bcore2 {
+				regulator-min-microvolt = <1050000>;
+				regulator-max-microvolt = <1050000>;
+				regulator-min-microamp = <5000000>;
+				regulator-max-microamp = <5000000>;
+				regulator-always-on;
+			};
+
+			vdd_bpro: bpro {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-min-microamp = <2500000>;
+				regulator-max-microamp = <2500000>;
+				regulator-always-on;
+			};
+
+			vdd_bperi: bperi {
+				regulator-min-microvolt = <1050000>;
+				regulator-max-microvolt = <1050000>;
+				regulator-min-microamp = <1500000>;
+				regulator-max-microamp = <1500000>;
+				regulator-always-on;
+			};
+
+			vdd_bmem: bmem {
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-min-microamp = <3000000>;
+				regulator-max-microamp = <3000000>;
+				regulator-always-on;
+			};
+
+			vdd_bio: bio {
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-min-microamp = <3000000>;
+				regulator-max-microamp = <3000000>;
+				regulator-always-on;
+			};
+
+			vdd_ldo1: ldo1 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-min-microamp = <100000>;
+				regulator-max-microamp = <100000>;
+				regulator-always-on;
+			};
+
+			vdd_ldo2: ldo2 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-min-microamp = <200000>;
+				regulator-max-microamp = <200000>;
+				regulator-always-on;
+			};
+
+			vdd_ldo3: ldo3 {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-min-microamp = <200000>;
+				regulator-max-microamp = <200000>;
+				regulator-always-on;
+			};
+
+			vdd_ldo4: ldo4 {
+				regulator-min-microvolt = <2500000>;
+				regulator-max-microvolt = <2500000>;
+				regulator-min-microamp = <200000>;
+				regulator-max-microamp = <200000>;
+				regulator-always-on;
+			};
+
+			vdd_ldo5: ldo5 {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-min-microamp = <100000>;
+				regulator-max-microamp = <100000>;
+				regulator-always-on;
+			};
+
+			vdd_ldo6: ldo6 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-min-microamp = <200000>;
+				regulator-max-microamp = <200000>;
+				regulator-always-on;
+			};
+
+			vdd_ldo7: ldo7 {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-min-microamp = <200000>;
+				regulator-max-microamp = <200000>;
+				regulator-always-on;
+			};
+
+			vdd_ldo8: ldo8 {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-min-microamp = <200000>;
+				regulator-max-microamp = <200000>;
+				regulator-always-on;
+			};
+
+			vdd_ld09: ldo9 {
+				regulator-min-microvolt = <1050000>;
+				regulator-max-microvolt = <1050000>;
+				regulator-min-microamp = <200000>;
+				regulator-max-microamp = <200000>;
+			};
+
+			vdd_ldo10: ldo10 {
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-min-microamp = <300000>;
+				regulator-max-microamp = <300000>;
+			};
+
+			vdd_ldo11: ldo11 {
+				regulator-min-microvolt = <2500000>;
+				regulator-max-microvolt = <2500000>;
+				regulator-min-microamp = <300000>;
+				regulator-max-microamp = <300000>;
+				regulator-always-on;
+			};
+		};
+	};
+};
+
+&qspi0 {
+	status = "okay";
+	flash@0 {
+		compatible = "issi,is25wp256", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		m25p,fast-read;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+	};
+};
+
+&spi0 {
+	status = "okay";
+	mmc@0 {
+		compatible = "mmc-spi-slot";
+		reg = <0>;
+		spi-max-frequency = <20000000>;
+		voltage-ranges = <3300 3300>;
+		disable-wp;
+	};
+};
+
+&eth0 {
+	status = "okay";
+	phy-mode = "gmii";
+	phy-handle = <&phy0>;
+	phy0: ethernet-phy@0 {
+		reg = <0>;
+	};
+};
+
+&pwm0 {
+	status = "okay";
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&gpio {
+	status = "okay";
+};
diff --git a/board/sifive/unleashed/Kconfig b/board/sifive/unleashed/Kconfig
index dbffd59c98..833cbd370d 100644
--- a/board/sifive/unleashed/Kconfig
+++ b/board/sifive/unleashed/Kconfig
@@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select SIFIVE_FU540
 	select ENV_IS_IN_SPI_FLASH
+	select RESET_SIFIVE
 	imply CMD_DHCP
 	imply CMD_EXT2
 	imply CMD_EXT4
diff --git a/board/sifive/unmatched/Kconfig b/board/sifive/unmatched/Kconfig
new file mode 100644
index 0000000000..9e2748ce1e
--- /dev/null
+++ b/board/sifive/unmatched/Kconfig
@@ -0,0 +1,50 @@
+if TARGET_SIFIVE_UNMATCHED
+
+config SYS_BOARD
+	default "unmatched"
+
+config SYS_VENDOR
+	default "sifive"
+
+config SYS_CPU
+	default "fu740"
+
+config SYS_CONFIG_NAME
+	default "sifive-unmatched"
+
+config SYS_TEXT_BASE
+	default 0x80200000 if SPL
+	default 0x80000000 if !RISCV_SMODE
+	default 0x80200000 if RISCV_SMODE
+
+config SPL_TEXT_BASE
+	default 0x08000000
+
+config SPL_OPENSBI_LOAD_ADDR
+	default 0x80000000
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select SIFIVE_FU740
+	select SUPPORT_SPL
+	select RESET_SIFIVE
+	imply CMD_DHCP
+	imply CMD_EXT2
+	imply CMD_EXT4
+	imply CMD_FAT
+	imply CMD_FS_GENERIC
+	imply CMD_GPT
+	imply PARTITION_TYPE_GUID
+	imply CMD_NET
+	imply CMD_PING
+	imply CMD_SF
+	imply DOS_PARTITION
+	imply EFI_PARTITION
+	imply IP_DYN
+	imply ISO_PARTITION
+	imply PHY_LIB
+	imply PHY_MSCC
+	imply SYSRESET
+	imply SYSRESET_GPIO
+
+endif
diff --git a/board/sifive/unmatched/MAINTAINERS b/board/sifive/unmatched/MAINTAINERS
new file mode 100644
index 0000000000..94c9510bfa
--- /dev/null
+++ b/board/sifive/unmatched/MAINTAINERS
@@ -0,0 +1,9 @@
+SiFive HiFive Unmatched FU740 BOARD
+M:	Paul Walmsley <paul.walmsley@sifive.com>
+M:	Pragnesh Patel <pragnesh.patel@sifive.com>
+M:	Green Wan <green.wan@sifive.com>
+S:	Maintained
+F:	board/sifive/unmatched/
+F:	doc/board/sifive/hifive-unmatched-fu740.rst
+F:	include/configs/sifive-unmatched.h
+F:	configs/sifive_unmatched_defconfig
diff --git a/board/sifive/unmatched/Makefile b/board/sifive/unmatched/Makefile
new file mode 100644
index 0000000000..6308c80d64
--- /dev/null
+++ b/board/sifive/unmatched/Makefile
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2020-2021 SiFive, Inc
+
+obj-y   += unmatched.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+endif
diff --git a/board/sifive/unmatched/spl.c b/board/sifive/unmatched/spl.c
new file mode 100644
index 0000000000..5e1333b09a
--- /dev/null
+++ b/board/sifive/unmatched/spl.c
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2020-2021 SiFive, Inc
+ *
+ * Authors:
+ *   Pragnesh Patel <pragnesh.patel@sifive.com>
+ */
+
+#include <init.h>
+#include <spl.h>
+#include <misc.h>
+#include <log.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <asm/gpio.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/spl.h>
+
+#define GEM_PHY_RESET	SIFIVE_GENERIC_GPIO_NR(0, 12)
+
+#define MODE_SELECT_REG		0x1000
+#define MODE_SELECT_SD		0xb
+#define MODE_SELECT_MASK	GENMASK(3, 0)
+
+int spl_board_init_f(void)
+{
+	int ret;
+
+	ret = spl_soc_init();
+	if (ret) {
+		debug("HiFive Unmatched FU740 SPL init failed: %d\n", ret);
+		return ret;
+	}
+
+	/*
+	 * GEMGXL init VSC8541 PHY reset sequence;
+	 * leave pull-down active for 2ms
+	 */
+	udelay(2000);
+	ret = gpio_request(GEM_PHY_RESET, "gem_phy_reset");
+	if (ret) {
+		debug("gem_phy_reset gpio request failed: %d\n", ret);
+		return ret;
+	}
+
+	/* Set GPIO 12 (PHY NRESET) */
+	ret = gpio_direction_output(GEM_PHY_RESET, 1);
+	if (ret) {
+		debug("gem_phy_reset gpio direction set failed: %d\n", ret);
+		return ret;
+	}
+
+	udelay(1);
+
+	/* Reset PHY again to enter unmanaged mode */
+	gpio_set_value(GEM_PHY_RESET, 0);
+	udelay(1);
+	gpio_set_value(GEM_PHY_RESET, 1);
+	mdelay(15);
+
+	return 0;
+}
+
+u32 spl_boot_device(void)
+{
+	u32 mode_select = readl((void *)MODE_SELECT_REG);
+	u32 boot_device = mode_select & MODE_SELECT_MASK;
+
+	switch (boot_device) {
+	case MODE_SELECT_SD:
+		return BOOT_DEVICE_MMC1;
+	default:
+		debug("Unsupported boot device 0x%x but trying MMC1\n",
+		      boot_device);
+		return BOOT_DEVICE_MMC1;
+	}
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	/* boot using first FIT config */
+	return 0;
+}
+#endif
diff --git a/board/sifive/unmatched/unmatched.c b/board/sifive/unmatched/unmatched.c
new file mode 100644
index 0000000000..6d60559588
--- /dev/null
+++ b/board/sifive/unmatched/unmatched.c
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2020-2021, SiFive Inc
+ *
+ * Authors:
+ *   Pragnesh Patel <pragnesh.patel@sifive.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/arch/cache.h>
+
+int board_init(void)
+{
+	int ret;
+
+	/* enable all cache ways */
+	ret = cache_enable_ways();
+	if (ret) {
+		debug("%s: could not enable cache ways\n", __func__);
+		return ret;
+	}
+	return 0;
+}
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 6e6a790dd6..3acd8fa6e1 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -318,7 +318,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
 		     ARCH_ROCKCHIP || ARCH_MVEBU ||  ARCH_SOCFPGA || \
 		     ARCH_AT91 || ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || \
 		     OMAP44XX || OMAP54XX || AM33XX || AM43XX || \
-		     TARGET_SIFIVE_UNLEASHED
+		     TARGET_SIFIVE_UNLEASHED || TARGET_SIFIVE_UNMATCHED
 	help
 	  Use sector number for specifying U-Boot location on MMC/SD in
 	  raw mode.
@@ -335,7 +335,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
 	default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \
 		         OMAP54XX || AM33XX || AM43XX || ARCH_K3
 	default 0x4000 if ARCH_ROCKCHIP
-	default 0x822 if TARGET_SIFIVE_UNLEASHED
+	default 0x822 if TARGET_SIFIVE_UNLEASHED || TARGET_SIFIVE_UNMATCHED
 	help
 	  Address on the MMC to load U-Boot from, when the MMC is being used
 	  in raw mode. Units: MMC sectors (1 sector = 512 bytes).
diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig
index 62416a7c1d..58e0718b7c 100644
--- a/configs/sifive_unleashed_defconfig
+++ b/configs/sifive_unleashed_defconfig
@@ -27,3 +27,4 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_CLK=y
 CONFIG_DM_MTD=y
 CONFIG_DM_RESET=y
+CONFIG_CLK_SIFIVE_PRCI=y
diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig
new file mode 100644
index 0000000000..c5ca0be0bf
--- /dev/null
+++ b/configs/sifive_unmatched_defconfig
@@ -0,0 +1,53 @@
+CONFIG_RISCV=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x3000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL_DM_SPI=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="hifive-unmatched-a00"
+CONFIG_TARGET_SIFIVE_UNMATCHED=y
+CONFIG_ARCH_RV64I=y
+CONFIG_RISCV_SMODE=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_CLK=y
+CONFIG_DM_RESET=y
+CONFIG_CMD_PCI=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_PCI_PNP=y
+CONFIG_PCIE_SIFIVE_FU740=y
+CONFIG_NVME=y
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_USB=y
+CONFIG_CMD_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_PCI=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_NVME=y
+CONFIG_SYS_USB_EVENT_POLL=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
+CONFIG_CMD_EEPROM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_I2C=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_OCORES=y
+CONFIG_CLK_SIFIVE_PRCI=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_SIFIVE=y
+CONFIG_CMD_PWM=y
diff --git a/doc/board/sifive/index.rst b/doc/board/sifive/index.rst
index ed7eacfb54..a43937a3e0 100644
--- a/doc/board/sifive/index.rst
+++ b/doc/board/sifive/index.rst
@@ -7,3 +7,4 @@ SiFive
    :maxdepth: 2
 
    unleashed
+   unmatched
diff --git a/doc/board/sifive/unmatched.rst b/doc/board/sifive/unmatched.rst
new file mode 100644
index 0000000000..e65b0d3206
--- /dev/null
+++ b/doc/board/sifive/unmatched.rst
@@ -0,0 +1,536 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+HiFive Unmatched
+================
+
+FU740-C000 RISC-V SoC
+---------------------
+The FU740-C000 is a 4+1 64-bit RISC-V core SoC from SiFive.
+
+The HiFive Unmatched development platform is based on FU740-C000 and capable
+of running Linux.
+
+Mainline support
+----------------
+The support for following drivers are already enabled:
+
+1. SiFive UART Driver.
+2. SiFive PRCI Driver for clock.
+3. Cadence MACB ethernet driver for networking support.
+4. SiFive SPI Driver.
+5. MMC SPI Driver for MMC/SD support.
+
+Booting from uSD using U-Boot SPL
+---------------------------------
+
+Building
+--------
+
+Before building U-Boot SPL, OpenSBI must be built first. OpenSBI can be
+cloned and built for FU740 as below:
+
+.. code-block:: console
+
+	git clone https://github.com/riscv/opensbi.git
+	cd opensbi
+	make PLATFORM=generic
+	export OPENSBI=<path to opensbi/build/platform/generic/firmware/fw_dynamic.bin>
+
+Now build the U-Boot SPL and U-Boot proper
+
+.. code-block:: console
+
+	cd <U-Boot-dir>
+	make sifive_unmatched_defconfig
+	make
+
+This will generate spl/u-boot-spl.bin and u-boot.itb
+
+
+Flashing
+--------
+
+ZSBL loads the U-Boot SPL (u-boot-spl.bin) from a partition with GUID type
+5B193300-FC78-40CD-8002-E86C45580B47
+
+U-Boot SPL expects u-boot.itb from a partition with GUID
+type 2E54B353-1271-4842-806F-E436D6AF6985
+
+u-boot.itb is a combination of fw_dynamic.bin, u-boot-nodtb.bin and
+device tree blob (hifive-unmatched-a00.dtb)
+
+Format the SD card (make sure the disk has GPT, otherwise use gdisk to switch)
+
+.. code-block:: none
+
+	# sudo sgdisk -g --clear -a 1 \
+	> --new=1:34:2081         --change-name=1:spl --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \
+	> --new=2:2082:10273      --change-name=2:uboot  --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \
+	> --new=3:16384:282623    --change-name=3:boot --typecode=3:0x0700 \
+	> --new=4:286720:13918207 --change-name=4:root --typecode=4:0x8300 \
+	> /dev/sdb
+
+Copy linux Image.gz and hifive-unmatched-a00.dtb to boot partition
+
+.. code-block:: none
+
+	sudo mkfs.vfat /dev/sdb3
+	sudo mkfs.ext4 /dev/sdb4
+
+	sudo mount /dev/sdb3 /media/sdb3
+	sudo cp Image.gz hifive-unmatched-a00.dtb /media/sdb3/
+
+Program the SD card
+
+.. code-block:: none
+
+	sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34
+	sudo dd if=u-boot.itb of=/dev/sda seek=2082
+
+Booting
+-------
+Once you plugin the sdcard and power up, you should see the U-Boot prompt.
+
+
+Loading the kernel and dtb
+
+.. code-block:: none
+
+	fatload mmc 0:3 ${kernel_addr_r} Image.gz
+	fatload mmc 0:3 ${fdt_addr_r} hifive-unmatched-a00.dtb
+	booti ${kernel_addr_r} - ${fdt_addr_r}
+
+
+Sample boot log from HiFive Unmatched board
+-------------------------------------------
+
+.. code-block:: none
+
+	U-Boot SPL 2021.04-rc4-00009-g7d70643cc3-dirty (Mar 16 2021 - 18:03:14 +0800)
+	Trying to boot from MMC1
+
+	U-Boot 2021.04-rc4-00009-g7d70643cc3-dirty (Mar 16 2021 - 18:03:14 +0800)
+
+	CPU:   rv64imafdc
+	Model: SiFive HiFive Unmatched A00
+	DRAM:  16 GiB
+	MMC:   spi@10050000:mmc@0: 0
+	In:    serial@10010000
+	Out:   serial@10010000
+	Err:   serial@10010000
+	Model: SiFive HiFive Unmatched A00
+	Net:
+	Error: ethernet@10090000 address not set.
+	No ethernet found.
+
+	Hit any key to stop autoboot:  0
+	PCIe Link up, Gen1
+
+	Device 0: Vendor: 0x126f Rev: S1111A0L Prod: AA000000000000001995
+		    Type: Hard Disk
+		    Capacity: 488386.3 MB = 476.9 GB (1000215216 x 512)
+	... is now current device
+	Scanning nvme 0:1...
+	libfdt fdt_check_header(): FDT_ERR_BADMAGIC
+	Scanning disk mmc@0.blk...
+	** Unrecognized filesystem type **
+	** Unrecognized filesystem type **
+	Scanning disk nvme#0.blk#0...
+	Found 8 disks
+	No EFI system partition
+
+	Error: ethernet@10090000 address not set.
+	BootOrder not defined
+	EFI boot manager: Cannot load any image
+	starting USB...
+	Bus xhci_pci: Register 4000840 NbrPorts 4
+	Starting the controller
+	USB XHCI 1.00
+	scanning bus xhci_pci for devices... 3 USB Device(s) found
+	       scanning usb for storage devices... 0 Storage Device(s) found
+
+	Device 0: unknown device
+	switch to partitions #0, OK
+	mmc0 is current device
+	Scanning mmc 0:3...
+	Found /extlinux/extlinux.conf
+	Retrieving file: /extlinux/extlinux.conf
+	205 bytes read in 9 ms (21.5 KiB/s)
+	1:      OpenEmbedded-SiFive-HiFive-Unmatched
+	Retrieving file: /Image.gz
+	7225919 bytes read in 4734 ms (1.5 MiB/s)
+	append: root=/dev/mmcblk0p4 rootfstype=ext4 rootwait console=ttySIF0,115200 earlycon=sbi
+	Retrieving file: /hifive-unmatched-a00.dtb
+	10445 bytes read in 13 ms (784.2 KiB/s)
+	   Uncompressing Kernel Image
+	Moving Image from 0x84000000 to 0x80200000, end=81629000
+	## Flattened Device Tree blob at 88000000
+	   Booting using the fdt blob at 0x88000000
+	   Using Device Tree in place at 0000000088000000, end 00000000880058cc
+
+	Starting kernel ...
+
+	[    0.000000] Linux version 5.10.15 (oe-user@oe-host) (riscv64-oe-linux-gcc (GCC) 10.2.0, GNU ld (GNU Binutils) 2.35.0.201
+	[    0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
+	[    0.000000] earlycon: sbi0 at I/O port 0x0 (options '')
+	[    0.000000] printk: bootconsole [sbi0] enabled
+	[    0.000000] efi: UEFI not found.
+	[    0.000000] Zone ranges:
+	[    0.000000]   DMA32    [mem 0x0000000080200000-0x00000000ffffffff]
+	[    0.000000]   Normal   [mem 0x0000000100000000-0x000000027fffffff]
+	[    0.000000] Movable zone start for each node
+	[    0.000000] Early memory node ranges
+	[    0.000000]   node   0: [mem 0x0000000080200000-0x000000027fffffff]
+	[    0.000000] Zeroed struct page in unavailable ranges: 512 pages
+	[    0.000000] Initmem setup node 0 [mem 0x0000000080200000-0x000000027fffffff]
+	[    0.000000] software IO TLB: mapped [mem 0x00000000fbfff000-0x00000000fffff000] (64MB)
+	[    0.000000] SBI specification v0.3 detected
+	[    0.000000] SBI implementation ID=0x1 Version=0x9
+	[    0.000000] SBI v0.2 TIME extension detected
+	[    0.000000] SBI v0.2 IPI extension detected
+	[    0.000000] SBI v0.2 RFENCE extension detected
+	[    0.000000] SBI v0.2 HSM extension detected
+	[    0.000000] CPU with hartid=0 is not available
+	[    0.000000] CPU with hartid=0 is not available
+	[    0.000000] riscv: ISA extensions acdfim
+	[    0.000000] riscv: ELF capabilities acdfim
+	[    0.000000] percpu: Embedded 26 pages/cpu s66904 r8192 d31400 u106496
+	[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 2067975
+	[    0.000000] Kernel command line: root=/dev/mmcblk0p4 rootfstype=ext4 rootwait console=ttySIF0,115200 earlycon=sbi
+	[    0.000000] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear)
+	[    0.000000] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
+	[    0.000000] Sorting __ex_table...
+	[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
+	[    0.000000] Memory: 8155880K/8386560K available (8490K kernel code, 5515K rwdata, 4096K rodata, 285K init, 383K bss, 23)
+	[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
+	[    0.000000] rcu: Hierarchical RCU implementation.
+	[    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4.
+	[    0.000000]  Tracing variant of Tasks RCU enabled.
+	[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
+	[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
+	[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
+	[    0.000000] CPU with hartid=0 is not available
+	[    0.000000] riscv-intc: unable to find hart id for /cpus/cpu@0/interrupt-controller
+	[    0.000000] riscv-intc: 64 local interrupts mapped
+	[    0.000000] plic: interrupt-controller@c000000: mapped 69 interrupts with 4 handlers for 9 contexts.
+	[    0.000000] random: get_random_bytes called from 0xffffffe000002a6a with crng_init=0
+	[    0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [1]
+	[    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1d854df40, max_idle_ns: 352636161696s
+	[    0.000007] sched_clock: 64 bits at 1000kHz, resolution 1000ns, wraps every 2199023255500ns
+	[    0.008626] Console: colour dummy device 80x25
+	[    0.013049] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.00 BogoMIPS (lpj=4000)
+	[    0.023115] pid_max: default: 32768 minimum: 301
+	[    0.028423] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
+	[    0.035919] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
+	[    0.045957] rcu: Hierarchical SRCU implementation.
+	[    0.050393] EFI services will not be available.
+	[    0.055132] smp: Bringing up secondary CPUs ...
+	[    0.061824] smp: Brought up 1 node, 4 CPUs
+	[    0.067458] devtmpfs: initialized
+	[    0.072700] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
+	[    0.081789] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
+	[    0.089738] NET: Registered protocol family 16
+	[    0.093999] thermal_sys: Registered thermal governor 'step_wise'
+	[    0.109208] iommu: Default domain type: Translated
+	[    0.119694] vgaarb: loaded
+	[    0.122571] SCSI subsystem initialized
+	[    0.126499] usbcore: registered new interface driver usbfs
+	[    0.131686] usbcore: registered new interface driver hub
+	[    0.137071] usbcore: registered new device driver usb
+	[    0.142286] EDAC MC: Ver: 3.0.0
+	[    0.145760] Advanced Linux Sound Architecture Driver Initialized.
+	[    0.152205] clocksource: Switched to clocksource riscv_clocksource
+	[    1.046286] VFS: Disk quotas dquot_6.6.0
+	[    1.049651] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
+	[    1.062844] NET: Registered protocol family 2
+	[    1.067172] tcp_listen_portaddr_hash hash table entries: 4096 (order: 4, 65536 bytes, linear)
+	[    1.075455] TCP established hash table entries: 65536 (order: 7, 524288 bytes, linear)
+	[    1.085428] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes, linear)
+	[    1.096548] TCP: Hash tables configured (established 65536 bind 65536)
+	[    1.103043] UDP hash table entries: 4096 (order: 5, 131072 bytes, linear)
+	[    1.109879] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes, linear)
+	[    1.117413] NET: Registered protocol family 1
+	[    1.121881] RPC: Registered named UNIX socket transport module.
+	[    1.127139] RPC: Registered udp transport module.
+	[    1.131901] RPC: Registered tcp transport module.
+	[    1.136677] RPC: Registered tcp NFSv4.1 backchannel transport module.
+	[    1.143194] PCI: CLS 0 bytes, default 64
+	[    1.148359] Initialise system trusted keyrings
+	[    1.152364] workingset: timestamp_bits=62 max_order=21 bucket_order=0
+	[    1.165382] NFS: Registering the id_resolver key type
+	[    1.169781] Key type id_resolver registered
+	[    1.174011] Key type id_legacy registered
+	[    1.178179] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
+	[    1.184874] Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
+	[    1.192453] 9p: Installing v9fs 9p2000 file system support
+	[    1.198116] NET: Registered protocol family 38
+	[    1.201886] Key type asymmetric registered
+	[    1.206046] Asymmetric key parser 'x509' registered
+	[    1.211029] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
+	[    1.218468] io scheduler mq-deadline registered
+	[    1.223072] io scheduler kyber registered
+	[    1.228803] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
+	[    1.235017] fu740-pcie e00000000.pcie: FPGA PCIE PROBE
+	[    1.281706] fu740-pcie e00000000.pcie: PCIE-PERSTN is GPIO 504
+	[    1.286922] fu740-pcie e00000000.pcie: PWREN is GPIO 501
+	[    1.292377] fu740-pcie e00000000.pcie: host bridge /soc/pcie@e00000000 ranges:
+	[    1.299603] fu740-pcie e00000000.pcie:       IO 0x0060080000..0x006008ffff -> 0x0060080000
+	[    1.307922] fu740-pcie e00000000.pcie:      MEM 0x0060090000..0x0070ffffff -> 0x0060090000
+	[    1.316244] fu740-pcie e00000000.pcie:      MEM 0x2000000000..0x3fffffffff -> 0x2000000000
+	[    1.432223] fu740-pcie e00000000.pcie: PWREN enabling
+	[    1.436607] fu740-pcie e00000000.pcie: PWREN valid
+	[    1.560226] fu740-pcie e00000000.pcie: invalid resource
+	[    1.664802] fu740-pcie e00000000.pcie: Link up
+	[    1.768582] fu740-pcie e00000000.pcie: Link up
+	[    1.872369] fu740-pcie e00000000.pcie: Link up
+	[    1.876116] fu740-pcie e00000000.pcie: Link up, Gen3
+	[    1.881352] fu740-pcie e00000000.pcie: PCI host bridge to bus 0000:00
+	[    1.887700] pci_bus 0000:00: root bus resource [bus 00-ff]
+	[    1.893247] pci_bus 0000:00: root bus resource [io  0x0000-0xffff] (bus address [0x60080000-0x6008ffff])
+	[    1.902807] pci_bus 0000:00: root bus resource [mem 0x60090000-0x70ffffff]
+	[    1.909748] pci_bus 0000:00: root bus resource [mem 0x2000000000-0x3fffffffff pref]
+	[    1.917517] pci 0000:00:00.0: [f15e:0000] type 01 class 0x060400
+	[    1.923569] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff]
+	[    1.929902] pci 0000:00:00.0: reg 0x38: [mem 0x00000000-0x0000ffff pref]
+	[    1.936723] pci 0000:00:00.0: supports D1
+	[    1.940755] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
+	[    1.947619] pci 0000:01:00.0: [1b21:2824] type 01 class 0x060400
+	[    1.953052] pci 0000:01:00.0: enabling Extended Tags
+	[    1.958165] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
+	[    1.976890] pci 0000:01:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
+	[    1.984425] pci 0000:02:00.0: [1b21:2824] type 01 class 0x060400
+	[    1.990396] pci 0000:02:00.0: enabling Extended Tags
+	[    1.995509] pci 0000:02:00.0: PME# supported from D0 D3hot D3cold
+	[    2.001938] pci 0000:02:02.0: [1b21:2824] type 01 class 0x060400
+	[    2.007682] pci 0000:02:02.0: enabling Extended Tags
+	[    2.012793] pci 0000:02:02.0: PME# supported from D0 D3hot D3cold
+	[    2.019167] pci 0000:02:03.0: [1b21:2824] type 01 class 0x060400
+	[    2.024966] pci 0000:02:03.0: enabling Extended Tags
+	[    2.030075] pci 0000:02:03.0: PME# supported from D0 D3hot D3cold
+	[    2.036468] pci 0000:02:04.0: [1b21:2824] type 01 class 0x060400
+	[    2.042250] pci 0000:02:04.0: enabling Extended Tags
+	[    2.047359] pci 0000:02:04.0: PME# supported from D0 D3hot D3cold
+	[    2.053811] pci 0000:02:08.0: [1b21:2824] type 01 class 0x060400
+	[    2.059534] pci 0000:02:08.0: enabling Extended Tags
+	[    2.064647] pci 0000:02:08.0: PME# supported from D0 D3hot D3cold
+	[    2.071499] pci 0000:02:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
+	[    2.078837] pci 0000:02:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring
+	[    2.086911] pci 0000:02:03.0: bridge configuration invalid ([bus 00-00]), reconfiguring
+	[    2.094987] pci 0000:02:04.0: bridge configuration invalid ([bus 00-00]), reconfiguring
+	[    2.103075] pci 0000:02:08.0: bridge configuration invalid ([bus 00-00]), reconfiguring
+	[    2.111901] pci_bus 0000:03: busn_res: [bus 03-ff] end is updated to 03
+	[    2.118031] pci 0000:04:00.0: [1b21:1142] type 00 class 0x0c0330
+	[    2.123968] pci 0000:04:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
+	[    2.131038] pci 0000:04:00.0: PME# supported from D3cold
+	[    2.148888] pci_bus 0000:04: busn_res: [bus 04-ff] end is updated to 04
+	[    2.155588] pci_bus 0000:05: busn_res: [bus 05-ff] end is updated to 05
+	[    2.162286] pci_bus 0000:06: busn_res: [bus 06-ff] end is updated to 06
+	[    2.168408] pci 0000:07:00.0: [126f:2263] type 00 class 0x010802
+	[    2.174351] pci 0000:07:00.0: reg 0x10: [mem 0x00000000-0x00003fff 64bit]
+	[    2.192890] pci_bus 0000:07: busn_res: [bus 07-ff] end is updated to 07
+	[    2.198837] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 07
+	[    2.205522] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 07
+	[    2.212241] pci 0000:00:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff]
+	[    2.219067] pci 0000:00:00.0: BAR 14: assigned [mem 0x60200000-0x603fffff]
+	[    2.226010] pci 0000:00:00.0: BAR 6: assigned [mem 0x60090000-0x6009ffff pref]
+	[    2.233308] pci 0000:01:00.0: BAR 14: assigned [mem 0x60200000-0x603fffff]
+	[    2.240259] pci 0000:02:02.0: BAR 14: assigned [mem 0x60200000-0x602fffff]
+	[    2.247203] pci 0000:02:08.0: BAR 14: assigned [mem 0x60300000-0x603fffff]
+	[    2.254150] pci 0000:02:00.0: PCI bridge to [bus 03]
+	[    2.259217] pci 0000:04:00.0: BAR 0: assigned [mem 0x60200000-0x60207fff 64bit]
+	[    2.266594] pci 0000:02:02.0: PCI bridge to [bus 04]
+	[    2.271615] pci 0000:02:02.0:   bridge window [mem 0x60200000-0x602fffff]
+	[    2.278485] pci 0000:02:03.0: PCI bridge to [bus 05]
+	[    2.283529] pci 0000:02:04.0: PCI bridge to [bus 06]
+	[    2.288572] pci 0000:07:00.0: BAR 0: assigned [mem 0x60300000-0x60303fff 64bit]
+	[    2.295952] pci 0000:02:08.0: PCI bridge to [bus 07]
+	[    2.300973] pci 0000:02:08.0:   bridge window [mem 0x60300000-0x603fffff]
+	[    2.307842] pci 0000:01:00.0: PCI bridge to [bus 02-07]
+	[    2.313133] pci 0000:01:00.0:   bridge window [mem 0x60200000-0x603fffff]
+	[    2.320009] pci 0000:00:00.0: PCI bridge to [bus 01-07]
+	[    2.325288] pci 0000:00:00.0:   bridge window [mem 0x60200000-0x603fffff]
+	[    2.332808] pcieport 0000:00:00.0: AER: enabled with IRQ 51
+	[    2.337946] pcieport 0000:01:00.0: enabling device (0000 -> 0002)
+	[    2.344786] pcieport 0000:02:02.0: enabling device (0000 -> 0002)
+	[    2.351328] pcieport 0000:02:08.0: enabling device (0000 -> 0002)
+	[    2.357091] pci 0000:04:00.0: enabling device (0000 -> 0002)
+	[    2.362751] switchtec: loaded.
+	[    2.365933] L2CACHE: DataError @ 0x00000003.00964470
+	[    2.365992] L2CACHE: No. of Banks in the cache: 4
+	[    2.375414] L2CACHE: No. of ways per bank: 16
+	[    2.379846] L2CACHE: Sets per bank: 512
+	[    2.383751] L2CACHE: Bytes per cache block: 64
+	[    2.388267] L2CACHE: Index of the largest way enabled: 15
+	[    2.434865] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+	[    2.441695] 10010000.serial: ttySIF0 at MMIO 0x10010000 (irq = 1, base_baud = 115200) is a SiFive UART v0
+	[    2.450625] printk: console [ttySIF0] enabled
+	[    2.450625] printk: console [ttySIF0] enabled
+	[    2.459360] printk: bootconsole [sbi0] disabled
+	[    2.459360] printk: bootconsole [sbi0] disabled
+	[    2.468824] 10011000.serial: ttySIF1 at MMIO 0x10011000 (irq = 2, base_baud = 115200) is a SiFive UART v0
+	[    2.493853] loop: module loaded
+	[    2.526475] nvme nvme0: pci function 0000:07:00.0
+	[    2.530852] nvme 0000:07:00.0: enabling device (0000 -> 0002)
+	[    2.537716] Rounding down aligned max_sectors from 4294967295 to 4294967288
+	[    2.544470] db_root: cannot open: /etc/target
+	[    2.545926] nvme nvme0: allocated 64 MiB host memory buffer.
+	[    2.549020] sifive_spi 10040000.spi: mapped; irq=4, cs=1
+	[    2.559941] spi-nor spi0.0: is25wp256 (32768 Kbytes)
+	[    2.566431] sifive_spi 10050000.spi: mapped; irq=6, cs=1
+	[    2.566707] nvme nvme0: 4/0/0 default/read/poll queues
+	[    2.571935] libphy: Fixed MDIO Bus: probed
+	[    2.580950] macb 10090000.ethernet: Registered clk switch 'sifive-gemgxl-mgmt'
+	[    2.587536] macb 10090000.ethernet: invalid hw address, using random
+	[    2.588100]  nvme0n1: p1 p2
+	[    2.593875] BEU: Load or Store TILINK BUS ERR occurred
+	[    2.594342] libphy: MACB_mii_bus: probed
+	[    2.599312] macb 10090000.ethernet eth0: Cadence GEM rev 0x10070109 at 0x10090000 irq 7 (5e:57:b8:ab:24:4a)
+	[    2.615501] e1000e: Intel(R) PRO/1000 Network Driver
+	[    2.620251] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
+	[    2.626463] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
+	[    2.632684] ehci-pci: EHCI PCI platform driver
+	[    2.637144] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
+	[    2.643273] ohci-pci: OHCI PCI platform driver
+	[    2.647731] uhci_hcd: USB Universal Host Controller Interface driver
+	[    2.654315] xhci_hcd 0000:04:00.0: xHCI Host Controller
+	[    2.659450] xhci_hcd 0000:04:00.0: new USB bus registered, assigned bus number 1
+	[    2.807373] xhci_hcd 0000:04:00.0: hcc params 0x0200e081 hci version 0x100 quirks 0x0000000010000410
+	[    2.816609] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.10
+	[    2.824115] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
+	[    2.831312] usb usb1: Product: xHCI Host Controller
+	[    2.836174] usb usb1: Manufacturer: Linux 5.10.15 xhci-hcd
+	[    2.841652] usb usb1: SerialNumber: 0000:04:00.0
+	[    2.846639] hub 1-0:1.0: USB hub found
+	[    2.850037] hub 1-0:1.0: 2 ports detected
+	[    2.854306] xhci_hcd 0000:04:00.0: xHCI Host Controller
+	[    2.859335] xhci_hcd 0000:04:00.0: new USB bus registered, assigned bus number 2
+	[    2.866599] xhci_hcd 0000:04:00.0: Host supports USB 3.0 SuperSpeed
+	[    2.873638] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
+	[    2.881074] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.10
+	[    2.889212] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
+	[    2.896422] usb usb2: Product: xHCI Host Controller
+	[    2.901282] usb usb2: Manufacturer: Linux 5.10.15 xhci-hcd
+	[    2.906752] usb usb2: SerialNumber: 0000:04:00.0
+	[    2.911671] hub 2-0:1.0: USB hub found
+	[    2.915130] hub 2-0:1.0: 2 ports detected
+	[    2.919486] usbcore: registered new interface driver usb-storage
+	[    2.925212] usbcore: registered new interface driver usbserial_generic
+	[    2.931620] usbserial: USB Serial support registered for generic
+	[    2.937771] mousedev: PS/2 mouse device common for all mice
+	[    2.943220] usbcore: registered new interface driver usbtouchscreen
+	[    2.949466] i2c /dev entries driver
+	[    2.954218] lm90 0-004c: supply vcc not found, using dummy regulator
+	[    2.961629] EDAC DEVICE0: Giving out device to module Sifive ECC Manager controller sifive_edac.0: DEV sifive_edac.0 (I)
+	[    2.997874] mmc_spi spi1.0: SD/MMC host mmc0, no DMA, no WP, no poweroff, cd polling
+	[    3.005138] ledtrig-cpu: registered to indicate activity on CPUs
+	[    3.010980] usbcore: registered new interface driver usbhid
+	[    3.016407] usbhid: USB HID core driver
+	[    3.020540] usbcore: registered new interface driver snd-usb-audio
+	[    3.027209] NET: Registered protocol family 10
+	[    3.031878] Segment Routing with IPv6
+	[    3.034864] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
+	[    3.041232] NET: Registered protocol family 17
+	[    3.045324] 9pnet: Installing 9P2000 support
+	[    3.049397] Key type dns_resolver registered
+	[    3.053786] Loading compiled-in X.509 certificates
+	[    3.059729] ALSA device list:
+	[    3.061943]   No soundcards found.
+	[    3.066057] Waiting for root device /dev/mmcblk0p4...
+	[    3.077319] mmc0: host does not support reading read-only switch, assuming write-enable
+	[    3.084564] mmc0: new SDHC card on SPI
+	[    3.089699] mmcblk0: mmc0:0000 SD32G 29.7 GiB
+	[    3.126488] GPT:Primary header thinks Alt. header is not at the end of the disk.
+	[    3.133144] GPT:13918241 != 62333951
+	[    3.136679] GPT:Alternate GPT header not at the end of the disk.
+	[    3.142673] GPT:13918241 != 62333951
+	[    3.146231] GPT: Use GNU Parted to correct GPT errors.
+	[    3.151398]  mmcblk0: p1 p2 p3 p4
+	[    3.212226] usb 1-2: new high-speed USB device number 2 using xhci_hcd
+	[    3.258310] EXT4-fs (mmcblk0p4): INFO: recovery required on readonly filesystem
+	[    3.264855] EXT4-fs (mmcblk0p4): write access will be enabled during recovery
+	[    3.458247] usb 1-2: New USB device found, idVendor=174c, idProduct=2074, bcdDevice= 0.01
+	[    3.465662] usb 1-2: New USB device strings: Mfr=2, Product=3, SerialNumber=1
+	[    3.472775] usb 1-2: Product: AS2107
+	[    3.476336] usb 1-2: Manufacturer: ASMedia
+	[    3.480419] usb 1-2: SerialNumber: USB2.0 Hub
+	[    3.533583] EXT4-fs (mmcblk0p4): recovery complete
+	[    3.543756] EXT4-fs (mmcblk0p4): mounted filesystem with ordered data mode. Opts: (null)
+	[    3.551132] VFS: Mounted root (ext4 filesystem) readonly on device 179:4.
+	[    3.554682] hub 1-2:1.0: USB hub found
+	[    3.561105] devtmpfs: mounted
+	[    3.561778] hub 1-2:1.0: 4 ports detected
+	[    3.565546] Freeing unused kernel memory: 284K
+	[    3.572964] Kernel memory protection not selected by kernel config.
+	[    3.579225] Run /sbin/init as init process
+	[    3.613136] usb 2-2: new SuperSpeed Gen 1 USB device number 2 using xhci_hcd
+	[    3.643539] usb 2-2: New USB device found, idVendor=174c, idProduct=3074, bcdDevice= 0.01
+	[    3.650948] usb 2-2: New USB device strings: Mfr=2, Product=3, SerialNumber=1
+	[    3.658072] usb 2-2: Product: AS2107
+	[    3.661630] usb 2-2: Manufacturer: ASMedia
+	[    3.665709] usb 2-2: SerialNumber: USB2.0 Hub
+	[    3.762380] hub 2-2:1.0: USB hub found
+	[    3.766074] hub 2-2:1.0: 4 ports detected
+	[    7.487226] systemd[1]: System time before build time, advancing clock.
+	[    7.788093] systemd[1]: systemd 247.2+ running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR -SMACK +SYSVINIT +U)
+	[    7.809694] systemd[1]: Detected architecture riscv64.
+
+	Welcome to OpenEmbedded nodistro.0!
+
+	[    7.832648] systemd[1]: Set hostname to <unmatched>.
+	[    9.397499] systemd[1]: Queued start job for default target Multi-User System.
+	[    9.408518] random: systemd: uninitialized urandom read (16 bytes read)
+	[    9.429329] systemd[1]: Created slice system-getty.slice.
+	[  OK  ] Created slice system-getty.slice.
+	[    9.440400] random: systemd: uninitialized urandom read (16 bytes read)
+	[    9.447086] systemd[1]: Created slice system-modprobe.slice.
+	[  OK  ] Created slice system-modprobe.slice.
+	[    9.458480] random: systemd: uninitialized urandom read (16 bytes read)
+	[    9.465436] systemd[1]: Created slice system-serial\x2dgetty.slice.
+	[  OK  ] Created slice system-serial\x2dgetty.slice.
+	[    9.478594] systemd[1]: Created slice User and Session Slice.
+	[  OK  ] Created slice User and Session Slice.
+	[    9.490225] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
+	[  OK  ] Started Dispatch Password ��…ts to Console Directory Watch.
+	[    9.506407] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
+	[  OK  ] Started Forward Password R��…uests to Wall Directory Watch.
+	[    9.522312] systemd[1]: Reached target Paths.
+	[  OK  ] Reached target Paths.
+	[    9.531078] systemd[1]: Reached target Remote File Systems.
+	[  OK  ] Reached target Remote File Systems.
+	[    9.542855] systemd[1]: Reached target Slices.
+	[  OK  ] Reached target Slices.
+	[    9.552712] systemd[1]: Reached target Swap.
+	[  OK  ] Reached target Swap.
+	[    9.561566] systemd[1]: Listening on initctl Compatibility Named Pipe.
+	[  OK  ] Listening on initctl Compatibility Named Pipe.
+	[    9.578686] systemd[1]: Condition check resulted in Journal Audit Socket being skipped.
+	[    9.586545] systemd[1]: Listening on Journal Socket (/dev/log).
+	[  OK  ] Listening on Journal Socket (/dev/log).
+
+	[snip]
+
+	[  OK  ] Reached target System Time Synchronized.
+	[  OK  ] Reached target Timers.
+	[  OK  ] Listening on D-Bus System Message Bus Socket.
+	[  OK  ] Reached target Sockets.
+	[  OK  ] Reached target Basic System.
+	[  OK  ] Started D-Bus System Message Bus.
+		 Starting User Login Management...
+		 Starting Permit User Sessions...
+	[  OK  ] Started Xinetd A Powerful Replacement For Inetd.
+	[  OK  ] Finished Permit User Sessions.
+	[  OK  ] Started Getty on tty1.
+	[  OK  ] Started Serial Getty on hvc0.
+	[  OK  ] Started Serial Getty on ttySIF0.
+	[  OK  ] Reached target Login Prompts.
+	[  OK  ] Started User Login Management.
+	[  OK  ] Reached target Multi-User System.
+		 Starting Update UTMP about System Runlevel Changes...
+	[  OK  ] Finished Update UTMP about System Runlevel Changes.
+
+	OpenEmbedded nodistro.0 unmatched hvc0
+
+	unmatched login:
+	OpenEmbedded nodistro.0 unmatched ttySIF0
+
+	unmatched login:
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 019565f979..8ddea851e8 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -166,7 +166,7 @@ config RESET_IPQ419
 
 config RESET_SIFIVE
 	bool "Reset Driver for SiFive SoC's"
-	depends on DM_RESET && CLK_SIFIVE_FU540_PRCI && TARGET_SIFIVE_UNLEASHED
+	depends on DM_RESET && CLK_SIFIVE_FU540_PRCI && (TARGET_SIFIVE_UNLEASHED || TARGET_SIFIVE_UNMATCHED)
 	default y
 	help
 	  PRCI module within SiFive SoC's provides mechanism to reset
diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h
new file mode 100644
index 0000000000..c73809dd19
--- /dev/null
+++ b/include/configs/sifive-unmatched.h
@@ -0,0 +1,85 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2020-2021 SiFive, Inc
+ *
+ * Authors:
+ *   Pragnesh Patel <pragnesh.patel@sifive.com>
+ */
+
+#ifndef __SIFIVE_UNMATCHED_H
+#define __SIFIVE_UNMATCHED_H
+
+#include <linux/sizes.h>
+
+#ifdef CONFIG_SPL
+
+#define CONFIG_SPL_MAX_SIZE		0x00100000
+#define CONFIG_SPL_BSS_START_ADDR	0x85000000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x00100000
+#define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_BSS_START_ADDR + \
+					 CONFIG_SPL_BSS_MAX_SIZE)
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x00100000
+
+#define CONFIG_SPL_STACK	(0x08000000 + 0x001D0000 - \
+				 GENERATED_GBL_DATA_SIZE)
+
+#endif
+
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_2M)
+
+#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_2M)
+
+#define CONFIG_SYS_MALLOC_LEN		SZ_8M
+
+#define CONFIG_SYS_BOOTM_LEN		SZ_64M
+
+#define CONFIG_STANDALONE_LOAD_ADDR	0x80200000
+
+#define CONFIG_SYS_PCI_64BIT		1	/* enable 64-bit resources */
+
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
+/* Environment options */
+
+#ifndef CONFIG_SPL_BUILD
+#define BOOT_TARGET_DEVICES(func) \
+	func(NVME, nvme, 0) \
+	func(USB, usb, 0) \
+	func(MMC, mmc, 0) \
+	func(PXE, pxe, na) \
+	func(DHCP, dhcp, na)
+
+#include <config_distro_bootcmd.h>
+
+#define TYPE_GUID_LOADER1	"5B193300-FC78-40CD-8002-E86C45580B47"
+#define TYPE_GUID_LOADER2	"2E54B353-1271-4842-806F-E436D6AF6985"
+#define TYPE_GUID_SYSTEM	"0FC63DAF-8483-4772-8E79-3D69D8477DE4"
+
+#define PARTS_DEFAULT \
+	"name=loader1,start=17K,size=1M,type=${type_guid_gpt_loader1};" \
+	"name=loader2,size=4MB,type=${type_guid_gpt_loader2};" \
+	"name=system,size=-,bootable,type=${type_guid_gpt_system};"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"fdt_high=0xffffffffffffffff\0" \
+	"initrd_high=0xffffffffffffffff\0" \
+	"kernel_addr_r=0x84000000\0" \
+	"fdt_addr_r=0x88000000\0" \
+	"scriptaddr=0x88100000\0" \
+	"pxefile_addr_r=0x88200000\0" \
+	"ramdisk_addr_r=0x88300000\0" \
+	"kernel_comp_addr_r=0x90000000\0" \
+	"kernel_comp_size=0x4000000\0" \
+	"type_guid_gpt_loader1=" TYPE_GUID_LOADER1 "\0" \
+	"type_guid_gpt_loader2=" TYPE_GUID_LOADER2 "\0" \
+	"type_guid_gpt_system=" TYPE_GUID_SYSTEM "\0" \
+	"partitions=" PARTS_DEFAULT "\0" \
+	BOOTENV
+
+#define CONFIG_PREBOOT \
+	"setenv fdt_addr ${fdtcontroladdr};" \
+	"fdt addr ${fdtcontroladdr};"
+#endif /* CONFIG_SPL_BUILD */
+
+#endif /* __SIFIVE_UNMATCHED_H */
