Message ID | 20210323083539.9552-2-green.wan@sifive.com |
---|---|
State | RFC |
Delegated to: | Andes |
Headers | show |
Series | [RFC,v2,1/2] arch: riscv: cpu: Add callback to init each core | expand |
On 3/23/21 4:35 AM, Green Wan wrote: > Clear feature disable CSR to turn on all features of hart. The detail > is specified at section, 'SiFive Feature Disable CSR', in user manual > > https://sifive.cdn.prismic.io/sifive/aee0dd4c-d156-496e-a6c4-db0cf54bbe68_sifive_U74MC_rtl_full_20G1.03.00_manual.pdf > > Signed-off-by: Green Wan <green.wan@sifive.com> > --- > board/sifive/unmatched/spl.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/board/sifive/unmatched/spl.c b/board/sifive/unmatched/spl.c > index 5e1333b09a..d09d129dc9 100644 > --- a/board/sifive/unmatched/spl.c > +++ b/board/sifive/unmatched/spl.c > @@ -22,6 +22,19 @@ > #define MODE_SELECT_SD 0xb > #define MODE_SELECT_MASK GENMASK(3, 0) > > +void riscv_hart_early_init(void) > +{ > +#if CONFIG_IS_ENABLED(RISCV_MMODE) use if (CONFIG_IS_ENABLED(RISCV_MMODE) please > + /* > + * Feature Disable CSR > + * > + * Clear feature disable CSR to '0' to turn on all features for > + * each core. This operatioin must be in m-mode. nit: operation > + */ > + asm volatile ("csrwi 0x7c1, 0"); Perhaps #define CSR_U74_FEATURE_DISABLE 0x7c1 csr_write(CSR_U74_FEATURE_DISABLE, 0); > +#endif > +} > + > int spl_board_init_f(void) > { > int ret; >
diff --git a/board/sifive/unmatched/spl.c b/board/sifive/unmatched/spl.c index 5e1333b09a..d09d129dc9 100644 --- a/board/sifive/unmatched/spl.c +++ b/board/sifive/unmatched/spl.c @@ -22,6 +22,19 @@ #define MODE_SELECT_SD 0xb #define MODE_SELECT_MASK GENMASK(3, 0) +void riscv_hart_early_init(void) +{ +#if CONFIG_IS_ENABLED(RISCV_MMODE) + /* + * Feature Disable CSR + * + * Clear feature disable CSR to '0' to turn on all features for + * each core. This operatioin must be in m-mode. + */ + asm volatile ("csrwi 0x7c1, 0"); +#endif +} + int spl_board_init_f(void) { int ret;
Clear feature disable CSR to turn on all features of hart. The detail is specified at section, 'SiFive Feature Disable CSR', in user manual https://sifive.cdn.prismic.io/sifive/aee0dd4c-d156-496e-a6c4-db0cf54bbe68_sifive_U74MC_rtl_full_20G1.03.00_manual.pdf Signed-off-by: Green Wan <green.wan@sifive.com> --- board/sifive/unmatched/spl.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)