| Message ID | 20210305070235.13547-1-Zhiqiang.Hou@nxp.com |
|---|---|
| State | Accepted |
| Commit | 6f6876a0c0304acc117d075344275d716f8a935a |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | [PATCHv3] arm64: gic-v3-its: Clear the Pending table before enabling LPIs | expand |
On Fri, Mar 05, 2021 at 03:02:35PM +0800, Zhiqiang Hou wrote: > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > The GICv3 RM requires "The first 1KB of memory for the LPI Pending tables > must contain only zeros on initial allocation, and this must be visible > to the Redistributors, or else the effect is UNPREDICTABLE". > > And as the following statement, we here clear the whole Pending tables > instead of the first 1KB. > "An LPI Pending table that contains only zeros, including in the first 1KB, > indicates that there are no pending LPIs. > The first 1KB of the LPI Pending table is IMPLEMENTATION DEFINED. However, > if the first 1KB of the LPI Pending table and the rest of the table contain > only zeros, this must indicate that there are no pending LPIs." > > And there isn't any pending LPI under U-Boot, so it's unnecessary to > load the contents of the Pending table during the enablement, then set > the GICR_PENDBASER.PTZ flag. > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > --- Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> # NXP LS1028A
> -----Original Message----- > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou > Sent: Friday, March 5, 2021 12:33 PM > To: u-boot@lists.denx.de > Cc: sjg@chromium.org; rayagonda.kokatanur@broadcom.com; Priyanka Jain > <priyanka.jain@nxp.com>; Z.q. Hou <zhiqiang.hou@nxp.com> > Subject: [PATCHv3] arm64: gic-v3-its: Clear the Pending table before enabling > LPIs > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > The GICv3 RM requires "The first 1KB of memory for the LPI Pending tables must > contain only zeros on initial allocation, and this must be visible to the > Redistributors, or else the effect is UNPREDICTABLE". > > And as the following statement, we here clear the whole Pending tables instead > of the first 1KB. > "An LPI Pending table that contains only zeros, including in the first 1KB, > indicates that there are no pending LPIs. > The first 1KB of the LPI Pending table is IMPLEMENTATION DEFINED. However, > if the first 1KB of the LPI Pending table and the rest of the table contain only > zeros, this must indicate that there are no pending LPIs." > > And there isn't any pending LPI under U-Boot, so it's unnecessary to load the > contents of the Pending table during the enablement, then set the > GICR_PENDBASER.PTZ flag. > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > --- > V3: > - Fix a mistake code delete in v2. > Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
>-----Original Message----- >From: Z.q. Hou <zhiqiang.hou@nxp.com> >Sent: Friday, March 5, 2021 12:33 PM >To: u-boot@lists.denx.de >Cc: sjg@chromium.org; rayagonda.kokatanur@broadcom.com; Priyanka Jain ><priyanka.jain@nxp.com>; Z.q. Hou <zhiqiang.hou@nxp.com> >Subject: [PATCHv3] arm64: gic-v3-its: Clear the Pending table before enabling >LPIs > >From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > >The GICv3 RM requires "The first 1KB of memory for the LPI Pending tables >must contain only zeros on initial allocation, and this must be visible to the >Redistributors, or else the effect is UNPREDICTABLE". > >And as the following statement, we here clear the whole Pending tables >instead of the first 1KB. >"An LPI Pending table that contains only zeros, including in the first 1KB, >indicates that there are no pending LPIs. >The first 1KB of the LPI Pending table is IMPLEMENTATION DEFINED. However, >if the first 1KB of the LPI Pending table and the rest of the table contain only >zeros, this must indicate that there are no pending LPIs." > >And there isn't any pending LPI under U-Boot, so it's unnecessary to load the >contents of the Pending table during the enablement, then set the >GICR_PENDBASER.PTZ flag. > >Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> >--- >V3: > - Fix a mistake code delete in v2. > > arch/arm/lib/gic-v3-its.c | 12 +++++++++++- > 1 file changed, 11 insertions(+), 1 deletion(-) > >diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c index >f5a921b3d1..2d3fdb600e 100644 >--- a/arch/arm/lib/gic-v3-its.c >+++ b/arch/arm/lib/gic-v3-its.c >@@ -3,6 +3,7 @@ > * Copyright 2019 Broadcom. > */ > #include <common.h> >+#include <cpu_func.h> > #include <dm.h> > #include <regmap.h> > #include <syscon.h> >@@ -108,6 +109,8 @@ int gic_lpi_tables_init(void) > int i; > u64 redist_lpi_base; > u64 pend_base; >+ ulong pend_tab_total_sz; >+ void *pend_tab_va; > > if (gic_v3_its_get_gic_addr(&priv)) > return -EINVAL; >@@ -161,6 +164,12 @@ int gic_lpi_tables_init(void) > } > > redist_lpi_base = priv.lpi_base + LPI_PROPBASE_SZ; >+ pend_tab_total_sz = priv.num_redist * LPI_PENDBASE_SZ; >+ pend_tab_va = map_physmem(redist_lpi_base, pend_tab_total_sz, >+ MAP_NOCACHE); >+ memset(pend_tab_va, 0, pend_tab_total_sz); >+ flush_cache((ulong)pend_tab_va, pend_tab_total_sz); >+ unmap_physmem(pend_tab_va, MAP_NOCACHE); > > pend_base = priv.gicr_base + GICR_PENDBASER; > for (i = 0; i < priv.num_redist; i++) { @@ -168,7 +177,8 @@ int >gic_lpi_tables_init(void) > > val = ((redist_lpi_base + (i * LPI_PENDBASE_SZ)) | > GICR_PENDBASER_INNERSHAREABLE | >- GICR_PENDBASER_RAWAWB); >+ GICR_PENDBASER_RAWAWB | >+ GICR_PENDBASER_PTZ); > > writeq(val, (uintptr_t)(pend_base + offset)); > tmp = readq((uintptr_t)(pend_base + offset)); >-- >2.17.1 Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Tom, Kindly help to merge this patch. This is required to fix boot issue on many of NXP fsl-qoriq platforms like lx2160ardb. Thanks Priyanka
On Fri, Mar 05, 2021 at 03:02:35PM +0800, Zhiqiang Hou wrote: > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > The GICv3 RM requires "The first 1KB of memory for the LPI Pending tables > must contain only zeros on initial allocation, and this must be visible > to the Redistributors, or else the effect is UNPREDICTABLE". > > And as the following statement, we here clear the whole Pending tables > instead of the first 1KB. > "An LPI Pending table that contains only zeros, including in the first 1KB, > indicates that there are no pending LPIs. > The first 1KB of the LPI Pending table is IMPLEMENTATION DEFINED. However, > if the first 1KB of the LPI Pending table and the rest of the table contain > only zeros, this must indicate that there are no pending LPIs." > > And there isn't any pending LPI under U-Boot, so it's unnecessary to > load the contents of the Pending table during the enablement, then set > the GICR_PENDBASER.PTZ flag. > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> # NXP LS1028A > Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Applied to u-boot/master, thanks!
diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c index f5a921b3d1..2d3fdb600e 100644 --- a/arch/arm/lib/gic-v3-its.c +++ b/arch/arm/lib/gic-v3-its.c @@ -3,6 +3,7 @@ * Copyright 2019 Broadcom. */ #include <common.h> +#include <cpu_func.h> #include <dm.h> #include <regmap.h> #include <syscon.h> @@ -108,6 +109,8 @@ int gic_lpi_tables_init(void) int i; u64 redist_lpi_base; u64 pend_base; + ulong pend_tab_total_sz; + void *pend_tab_va; if (gic_v3_its_get_gic_addr(&priv)) return -EINVAL; @@ -161,6 +164,12 @@ int gic_lpi_tables_init(void) } redist_lpi_base = priv.lpi_base + LPI_PROPBASE_SZ; + pend_tab_total_sz = priv.num_redist * LPI_PENDBASE_SZ; + pend_tab_va = map_physmem(redist_lpi_base, pend_tab_total_sz, + MAP_NOCACHE); + memset(pend_tab_va, 0, pend_tab_total_sz); + flush_cache((ulong)pend_tab_va, pend_tab_total_sz); + unmap_physmem(pend_tab_va, MAP_NOCACHE); pend_base = priv.gicr_base + GICR_PENDBASER; for (i = 0; i < priv.num_redist; i++) { @@ -168,7 +177,8 @@ int gic_lpi_tables_init(void) val = ((redist_lpi_base + (i * LPI_PENDBASE_SZ)) | GICR_PENDBASER_INNERSHAREABLE | - GICR_PENDBASER_RAWAWB); + GICR_PENDBASER_RAWAWB | + GICR_PENDBASER_PTZ); writeq(val, (uintptr_t)(pend_base + offset)); tmp = readq((uintptr_t)(pend_base + offset));