diff mbox series

[v2,1/2] ARM: dts: imx8m: increase off-on delay on the SD Vcc regulator

Message ID 20201202175910.11493-1-andrey.zhizhikin@leica-geosystems.com
State Superseded
Delegated to: Stefano Babic
Headers show
Series [v2,1/2] ARM: dts: imx8m: increase off-on delay on the SD Vcc regulator | expand

Commit Message

ZHIZHIKIN Andrey Dec. 2, 2020, 5:59 p.m. UTC 
Some SD Card controller and power circuitry has increased capacitance,
which keeps the internal logic remains powered after regulator is switch
off. This is generally the case when card is switched to SD104 mode,
where a power cycle should be performed. In case if the card internal
logic remains powered, it causes a subsequent failure of mode
transition, effectively leading to failed enumeration.

Introduce a delay of 20 msec in order to provide a possibility for
internal card circuitry to drain voltages and perform a power cycle
correctly.

Similar fix is done in commit c49d0ac38a76 ("ARM: dts: rmobile: Increase
off-on delay on the SD Vcc regulator") targeted Renesas SOCs.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Stefano Babic <sbabic@denx.de>
---
Changes in v2:
- Moved u-boot binding for imx8mq-evk and imx8mq-phanbell to separate
  autoincluded dtsi files 

 arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi | 4 ++++
 arch/arm/dts/imx8mm-evk-u-boot.dtsi        | 4 ++++
 arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi   | 4 ++++
 arch/arm/dts/imx8mp-evk-u-boot.dtsi        | 4 ++++
 arch/arm/dts/imx8mq-evk-u-boot.dtsi        | 5 +++++
 arch/arm/dts/imx8mq-phanbell-u-boot.dtsi   | 5 +++++
 6 files changed, 26 insertions(+)
 create mode 100644 arch/arm/dts/imx8mq-evk-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx8mq-phanbell-u-boot.dtsi
diff mbox series

Patch

diff --git a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
index fc1aebb2fe..6d80a529ae 100644
--- a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
@@ -37,6 +37,10 @@ 
 	/delete-property/ assigned-clock-rates;
 };
 
+&reg_usdhc2_vmmc {
+	u-boot,off-on-delay-us = <20000>;
+};
+
 &fec1 {
 	phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
 };
diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi
index b5c12105a9..9f77d3c6ff 100644
--- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi
@@ -46,6 +46,10 @@ 
 	u-boot,dm-spl;
 };
 
+&reg_usdhc2_vmmc {
+	u-boot,off-on-delay-us = <20000>;
+};
+
 &pinctrl_reg_usdhc2_vmmc {
 	u-boot,dm-spl;
 };
diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
index 4419679d4c..98b0b9891b 100644
--- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
@@ -47,6 +47,10 @@ 
 	u-boot,dm-spl;
 };
 
+&reg_usdhc2_vmmc {
+	u-boot,off-on-delay-us = <20000>;
+};
+
 &pinctrl_uart2 {
 	u-boot,dm-spl;
 };
diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
index 24a93ac2d6..2452e9175c 100644
--- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
@@ -48,6 +48,10 @@ 
 	u-boot,dm-spl;
 };
 
+&reg_usdhc2_vmmc {
+	u-boot,off-on-delay-us = <20000>;
+};
+
 &reg_usdhc2_vmmc {
 	u-boot,dm-spl;
 };
diff --git a/arch/arm/dts/imx8mq-evk-u-boot.dtsi b/arch/arm/dts/imx8mq-evk-u-boot.dtsi
new file mode 100644
index 0000000000..4712cf6a44
--- /dev/null
+++ b/arch/arm/dts/imx8mq-evk-u-boot.dtsi
@@ -0,0 +1,5 @@ 
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+&reg_usdhc2_vmmc {
+	u-boot,off-on-delay-us = <20000>;
+};
diff --git a/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi b/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi
new file mode 100644
index 0000000000..4712cf6a44
--- /dev/null
+++ b/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi
@@ -0,0 +1,5 @@ 
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+&reg_usdhc2_vmmc {
+	u-boot,off-on-delay-us = <20000>;
+};