diff mbox series

[PATCHv6,17/18] configs: P2020RDB: Enable DM_ETH config

Message ID 20200922092347.19141-18-Zhiqiang.Hou@nxp.com
State Not Applicable
Delegated to: Priyanka Jain
Headers show
Series powerpc: convert p1010, p1020 and p2020 RDB boards to DM_ETH | expand

Commit Message

Z.Q. Hou Sept. 22, 2020, 9:23 a.m. UTC 
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Enable the DM_ETH and DM_MDIO config.

On P2020RDB, the eTSEC1 is connecting with a switch VSC7385,
so also enable the fixed PHY support.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
V6:
 - No change.

 configs/P2020RDB-PC_36BIT_NAND_defconfig     | 3 +++
 configs/P2020RDB-PC_36BIT_SDCARD_defconfig   | 3 +++
 configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 3 +++
 configs/P2020RDB-PC_36BIT_defconfig          | 3 +++
 configs/P2020RDB-PC_NAND_defconfig           | 3 +++
 configs/P2020RDB-PC_SDCARD_defconfig         | 3 +++
 configs/P2020RDB-PC_SPIFLASH_defconfig       | 3 +++
 configs/P2020RDB-PC_defconfig                | 3 +++
 8 files changed, 24 insertions(+)
diff mbox series

Patch

diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index 1e0bd202ea..ba4dd7fe1d 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -67,6 +67,7 @@  CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_FIXED=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
 CONFIG_PHY_DAVICOM=y
@@ -78,8 +79,10 @@  CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_MDIO=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index df57340c7d..ef98374ea3 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -62,6 +62,7 @@  CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_FIXED=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
 CONFIG_PHY_DAVICOM=y
@@ -73,8 +74,10 @@  CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_MDIO=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index 1b250214e7..e1ebb1f896 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -64,6 +64,7 @@  CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_FIXED=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
 CONFIG_PHY_DAVICOM=y
@@ -75,8 +76,10 @@  CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_MDIO=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index e5573cd22a..4a7d726e2f 100644
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -51,6 +51,7 @@  CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_FIXED=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
 CONFIG_PHY_DAVICOM=y
@@ -62,8 +63,10 @@  CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_MDIO=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index 6232b18aa9..5d8d531f69 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -66,6 +66,7 @@  CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_FIXED=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
 CONFIG_PHY_DAVICOM=y
@@ -77,8 +78,10 @@  CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_MDIO=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index 4d3b872f72..61b1c1f8b4 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -61,6 +61,7 @@  CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_FIXED=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
 CONFIG_PHY_DAVICOM=y
@@ -72,8 +73,10 @@  CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_MDIO=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index 7b97d9186a..f649c494e1 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -63,6 +63,7 @@  CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_FIXED=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
 CONFIG_PHY_DAVICOM=y
@@ -74,8 +75,10 @@  CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_MDIO=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index 3a1f668716..b08adb7ffa 100644
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -50,6 +50,7 @@  CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_FIXED=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y
 CONFIG_PHY_DAVICOM=y
@@ -61,8 +62,10 @@  CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_MDIO=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y