| Message ID | 20200907065458.492509-1-a.heider@gmail.com |
|---|---|
| State | Accepted |
| Commit | 2781c71873fc4767b958a72eea12d3d49a60cdbf |
| Delegated to: | Stefan Roese |
| Headers | show |
| Series | mtd: spi-nor-ids: add support for Macronix mx25u12835f flash | expand |
On 07.09.20 08:54, Andre Heider wrote: > From: Vladimir Vid <vladimir.vid@sartura.hr> > > Some of Marvell A3700 boards use mx25u12835f, specifically uDPU > and ESPRESSObin v7. > > Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr> > [a.heider: adapt commit message to mainline] > Signed-off-by: Andre Heider <a.heider@gmail.com> > --- > > Patch taken from OpenWRT's uboot-mvebu package. Applied to u-boot-marvell/master Thanks, Stefan > drivers/mtd/spi/spi-nor-ids.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c > index 114ebacde1..bc9d4f7e9f 100644 > --- a/drivers/mtd/spi/spi-nor-ids.c > +++ b/drivers/mtd/spi/spi-nor-ids.c > @@ -151,6 +151,7 @@ const struct flash_info spi_nor_ids[] = { > { INFO("mx25u3235f", 0xc22536, 0, 4 * 1024, 1024, SECT_4K) }, > { INFO("mx25u6435f", 0xc22537, 0, 64 * 1024, 128, SECT_4K) }, > { INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, 0) }, > + { INFO("mx25u12835f", 0xc22538, 0, 64 * 1024, 256, SECT_4K) }, > { INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) }, > { INFO("mx25l25635e", 0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > { INFO("mx25u25635f", 0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) }, > Viele Grüße, Stefan
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 114ebacde1..bc9d4f7e9f 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -151,6 +151,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("mx25u3235f", 0xc22536, 0, 4 * 1024, 1024, SECT_4K) }, { INFO("mx25u6435f", 0xc22537, 0, 64 * 1024, 128, SECT_4K) }, { INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, 0) }, + { INFO("mx25u12835f", 0xc22538, 0, 64 * 1024, 256, SECT_4K) }, { INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) }, { INFO("mx25l25635e", 0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("mx25u25635f", 0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },