From patchwork Fri Sep 4 15:34:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pratyush Yadav X-Patchwork-Id: 1357673 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=LdkpAr9i; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BjhfF5tSTz9sTg for ; Sat, 5 Sep 2020 01:38:29 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 14DC882348; Fri, 4 Sep 2020 17:35:44 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="LdkpAr9i"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 2B0748233D; Fri, 4 Sep 2020 17:35:42 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 544A182335 for ; Fri, 4 Sep 2020 17:35:39 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=p.yadav@ti.com Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 084FZZjB017612; Fri, 4 Sep 2020 10:35:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1599233735; bh=YStWUL8LZX/HohEMISVPQeMOMJY26RDSg5TUjzlHCTw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=LdkpAr9iYXagmdybB26IkjQIzbf39qvO5AoYGpBEMWPCGLO0JEz2ipeFIMsp3DT0Z EWd4gOf/hM9byCgWQFDJf2f3qYwOzSvDV/VbmLCrMi6Wk9thh60zNptBaOeC7PYOZe Wa12r0psy+5MPPk/+D1WUrQQxFSkwQbnCKBRaIXo= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 084FZZLG013082 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 4 Sep 2020 10:35:35 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Fri, 4 Sep 2020 10:35:35 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Fri, 4 Sep 2020 10:35:35 -0500 Received: from pratyush-OptiPlex-790.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 084FZ112025438; Fri, 4 Sep 2020 10:35:33 -0500 From: Pratyush Yadav To: Jagan Teki , Chris Packham , Vignesh R , CC: Pratyush Yadav , Sekhar Nori Subject: [PATCH v7 14/21] mtd: spi-nor-core: Prepare Read SR and FSR for Octal DTR mode Date: Fri, 4 Sep 2020 21:04:53 +0530 Message-ID: <20200904153500.3569-15-p.yadav@ti.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200904153500.3569-1-p.yadav@ti.com> References: <20200904153500.3569-1-p.yadav@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean The xSPI Profile 1.0 table specifies how many dummy cycles and address bytes are needed for the Read Status Register command in Octal DTR mode. Use that information to send the correct Read SR command. Some controllers might have trouble reading just 1 byte in DTR mode. So, when we are in DTR mode read 2 bytes and discard the second. This shows no side effects with the two flashes I tested: Micron mt35xu512aba and Cypress s28hs512t. Update Read FSR to mimic Read SR because they share the same characteristics. Signed-off-by: Pratyush Yadav --- drivers/mtd/spi/spi-nor-core.c | 48 +++++++++++++++++++++++++++++----- 1 file changed, 42 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 3afb550db7..2cb327b621 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -375,16 +375,34 @@ static ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, */ static int read_sr(struct spi_nor *nor) { + struct spi_mem_op op; int ret; - u8 val; + u8 val[2]; - ret = nor->read_reg(nor, SPINOR_OP_RDSR, &val, 1); + op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 1), + SPI_MEM_OP_NO_ADDR, + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_DATA_IN(1, NULL, 1)); + + if (spi_nor_protocol_is_dtr(nor->reg_proto)) { + op.addr.nbytes = nor->rdsr_addr_nbytes; + op.dummy.nbytes = nor->rdsr_dummy; + /* + * We don't want to read only one byte in DTR mode. So, read 2 + * and then discard the second byte. + */ + op.data.nbytes = 2; + } + + spi_nor_setup_op(nor, &op, nor->reg_proto); + + ret = spi_nor_read_write_reg(nor, &op, val); if (ret < 0) { pr_debug("error %d reading SR\n", (int)ret); return ret; } - return val; + return *val; } /* @@ -394,16 +412,34 @@ static int read_sr(struct spi_nor *nor) */ static int read_fsr(struct spi_nor *nor) { + struct spi_mem_op op; int ret; - u8 val; + u8 val[2]; - ret = nor->read_reg(nor, SPINOR_OP_RDFSR, &val, 1); + op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDFSR, 1), + SPI_MEM_OP_NO_ADDR, + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_DATA_IN(1, NULL, 1)); + + if (spi_nor_protocol_is_dtr(nor->reg_proto)) { + op.addr.nbytes = nor->rdsr_addr_nbytes; + op.dummy.nbytes = nor->rdsr_dummy; + /* + * We don't want to read only one byte in DTR mode. So, read 2 + * and then discard the second byte. + */ + op.data.nbytes = 2; + } + + spi_nor_setup_op(nor, &op, nor->reg_proto); + + ret = spi_nor_read_write_reg(nor, &op, val); if (ret < 0) { pr_debug("error %d reading FSR\n", ret); return ret; } - return val; + return *val; } /*