From patchwork Mon Aug 10 14:58:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 1342878 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=mailerdienst.de header.i=@mailerdienst.de header.a=rsa-sha256 header.s=20200217 header.b=wRicIGDK; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BQK213N44z9sRK for ; Tue, 11 Aug 2020 01:02:16 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 5CC1982238; Mon, 10 Aug 2020 17:00:46 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="wRicIGDK"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 3E72F819EA; Mon, 10 Aug 2020 16:59:19 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mxwww.masterlogin.de (mxwww.masterlogin.de [95.129.51.220]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 9659081B50 for ; Mon, 10 Aug 2020 16:59:14 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=linux@fw-web.de Received: from mxout3.routing.net (unknown [192.168.10.111]) by forward.mxwww.masterlogin.de (Postfix) with ESMTPS id 478BE96336; Mon, 10 Aug 2020 14:59:14 +0000 (UTC) Received: from mxbox2.masterlogin.de (unknown [192.168.10.89]) by mxout3.routing.net (Postfix) with ESMTP id 1DC046047A; Mon, 10 Aug 2020 14:59:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1597071554; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=UZOlDKRLzbWfpThLg4F6dConZFGnZu/e7hIuWv415Ks=; b=wRicIGDKfyNQsA6mEOckR9R0AE4SSj8Fxos0Qk0y3+nFKezMOjSJ27wectPCvFzUFDg9AH imNe6bxP01vv/zNkINFW0W+yztW+1sWMlvhjL9+IEcxuFW6SZfAiHz3gsrDvuznh1VUnu8 oYa9tjZHI3K+63Y8Sl7B65sR4FbiuJM= Received: from localhost.localdomain (fttx-pool-217.61.151.249.bambit.de [217.61.151.249]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 6C2A7100394; Mon, 10 Aug 2020 14:59:13 +0000 (UTC) From: Frank Wunderlich To: u-boot@lists.denx.de Cc: Frank Wunderlich , GSS_MTK_Uboot_upstream , Ryder Lee , Weijie Gao , Lukasz Majewski , Frank Wunderlich Subject: [PATCH 4/5] ahci: mediatek: add ahci driver Date: Mon, 10 Aug 2020 16:58:50 +0200 Message-Id: <20200810145851.43381-5-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200810145851.43381-1-linux@fw-web.de> References: <20200810145851.43381-1-linux@fw-web.de> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 10 Aug 2020 17:00:31 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean add AHCI driver ported from linux https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/ata/ahci_mtk.c Signed-off-by: Frank Wunderlich --- drivers/ata/Kconfig | 8 ++ drivers/ata/Makefile | 1 + drivers/ata/mtk_ahci.c | 194 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 203 insertions(+) create mode 100644 drivers/ata/mtk_ahci.c diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index d8c9756c2a..f2f8275aec 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -130,4 +130,12 @@ config AHCI_MVEBU onboard AHCI SATA. If unsure, say N. + +config MTK_AHCI + bool "Enable Mediatek AHCI driver support" + depends on AHCI + help + Enable this driver to support Sata devices through + Mediatek AHCI controller (e.g. MT7622). + endmenu diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile index a69edb10f7..98fb480700 100644 --- a/drivers/ata/Makefile +++ b/drivers/ata/Makefile @@ -19,3 +19,4 @@ obj-$(CONFIG_SATA_SIL) += sata_sil.o obj-$(CONFIG_SANDBOX) += sata_sandbox.o obj-$(CONFIG_AHCI_MVEBU) += ahci_mvebu.o obj-$(CONFIG_SUNXI_AHCI) += ahci_sunxi.o +obj-$(CONFIG_MTK_AHCI) += mtk_ahci.o diff --git a/drivers/ata/mtk_ahci.c b/drivers/ata/mtk_ahci.c new file mode 100644 index 0000000000..25a3c97906 --- /dev/null +++ b/drivers/ata/mtk_ahci.c @@ -0,0 +1,194 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * MTK SATA platform driver + * + * (C) Copyright 2020 + * Mediatek + * + * Author: Frank Wunderlich + * based on https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/ata/ahci_mtk.c + * Author: Ryder Lee + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SYS_CFG 0x14 +#define SYS_CFG_SATA_MSK GENMASK(31, 30) +#define SYS_CFG_SATA_EN BIT(31) + +struct mtk_ahci_priv { + void *base; + + struct regmap *mode; + struct reset_ctl axi_rst; + struct reset_ctl sw_rst; + struct reset_ctl reg_rst; +}; + +static int mtk_ahci_bind(struct udevice *dev) +{ + struct udevice *scsi_dev; + + return ahci_bind_scsi(dev, &scsi_dev); +} + +static int mtk_ahci_ofdata_to_platdata(struct udevice *dev) +{ + struct mtk_ahci_priv *priv = dev_get_priv(dev); + + priv->base = map_physmem(devfdt_get_addr(dev), sizeof(void *), + MAP_NOCACHE); + + return 0; +} + +static int mtk_ahci_platform_resets(struct udevice *dev) +{ + struct mtk_ahci_priv *priv = dev_get_priv(dev); + int ret; + + ret=reset_get_by_name(dev, "axi",&priv->axi_rst); + if (ret) { + pr_err("unable to find reset controller 'axi'\n"); + return ret; + } + + ret=reset_get_by_name(dev, "sw",&priv->sw_rst); + if (ret) { + pr_err("unable to find reset controller 'sw'\n"); + return ret; + } + + ret=reset_get_by_name(dev, "reg",&priv->reg_rst); + if (ret) { + pr_err("unable to find reset controller 'reg'\n"); + return ret; + } + + ret=reset_assert(&priv->axi_rst); + if (ret) { + pr_err("unable to assert reset controller 'axi'\n"); + return ret; + } + + ret=reset_assert(&priv->sw_rst); + if (ret) { + pr_err("unable to assert reset controller 'sw'\n"); + return ret; + } + + ret=reset_assert(&priv->reg_rst); + if (ret) { + pr_err("unable to assert reset controller 'reg'\n"); + return ret; + } + + ret=reset_deassert(&priv->axi_rst); + if (ret) { + pr_err("unable to deassert reset controller 'axi'\n"); + return ret; + } + + ret=reset_deassert(&priv->sw_rst); + if (ret) { + pr_err("unable to deassert reset controller 'sw'\n"); + return ret; + } + + ret=reset_deassert(&priv->reg_rst); + if (ret) { + pr_err("unable to deassert reset controller 'reg'\n"); + return ret; + } + return 0; +} + +static int mtk_ahci_parse_property(struct ahci_uc_priv *hpriv,struct udevice *dev) +{ + struct mtk_ahci_priv *plat = dev_get_priv(dev); + const void *fdt = gd->fdt_blob; + + /* enable SATA function if needed */ + if (fdt_get_property(fdt, dev_of_offset(dev),"mediatek,phy-mode", NULL)) { + plat->mode = syscon_regmap_lookup_by_phandle( + dev, "mediatek,phy-mode"); + if (IS_ERR(plat->mode)) { + dev_err(dev, "missing phy-mode phandle\n"); + return PTR_ERR(plat->mode); + } + regmap_update_bits(plat->mode, SYS_CFG, SYS_CFG_SATA_MSK, + SYS_CFG_SATA_EN); + } + + ofnode_read_u32(dev->node, "ports-implemented", &hpriv->port_map); + return 0; +} + +static int mtk_ahci_probe(struct udevice *dev) +{ + struct mtk_ahci_priv *priv = dev_get_priv(dev); + int ret; + struct phy phy; + struct ahci_uc_priv *hpriv; + + hpriv = malloc(sizeof(struct ahci_uc_priv)); + if (!hpriv) + return -ENOMEM; + + memset(hpriv, 0, sizeof(struct ahci_uc_priv)); + + ret = mtk_ahci_parse_property(hpriv,dev); + if (ret) + return ret; + + ret = mtk_ahci_platform_resets(dev); + if (ret) + return ret; + + ret = generic_phy_get_by_name(dev, "sata-phy", &phy); + if (ret) { + pr_err("can't get the phy from DT\n"); + return ret; + } + + ret = generic_phy_init(&phy); + if (ret) { + pr_err("unable to initialize the sata phy\n"); + return ret; + } + + ret = generic_phy_power_on(&phy); + if (ret) { + pr_err("unable to power on the sata phy\n"); + return ret; + } + + return ahci_probe_scsi(dev, (ulong)priv->base); +} + +static const struct udevice_id mtk_ahci_ids[] = { + { .compatible = "mediatek,mtk-ahci" }, + { } +}; + +U_BOOT_DRIVER(mtk_ahci) = { + .name = "mtk_ahci", + .id = UCLASS_AHCI, + .of_match = mtk_ahci_ids, + .bind = mtk_ahci_bind, + .ofdata_to_platdata = mtk_ahci_ofdata_to_platdata, + .ops = &scsi_ops, + .probe = mtk_ahci_probe, + .priv_auto_alloc_size = sizeof(struct mtk_ahci_priv), +};