From patchwork Wed Aug 5 17:14:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lokesh Vutla X-Patchwork-Id: 1341310 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=pJkZ2Ax/; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BMJFH4tdwz9sPB for ; Thu, 6 Aug 2020 03:16:35 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4C961821E7; Wed, 5 Aug 2020 19:15:00 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="pJkZ2Ax/"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id EB2BA821D9; Wed, 5 Aug 2020 19:14:58 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id DF5FB821ED for ; Wed, 5 Aug 2020 19:14:55 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=lokeshvutla@ti.com Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 075HEsUQ037542 for ; Wed, 5 Aug 2020 12:14:54 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1596647694; bh=GjLjZRch/1OLqmy8MwqHJiihovdpVe3IOm8Kp5OgGfw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=pJkZ2Ax/3Xs6XqJInH6pN1BJlQ4j8yidgZfWpmXJmf0Pkm5TS+W4PQW4j+Oq3Ri/J 0ICBPfV7xrUOE76qZ59YUDw6rfTrixQfV6QKd4uilxvCPBTpQZPBIIJr7g3rmQVHFh jTE45CXxgV+OBXhUAXThhZH3fZsZkNJkCtmqZTU8= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 075HEs8X041995 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL) for ; Wed, 5 Aug 2020 12:14:54 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Wed, 5 Aug 2020 12:14:54 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 5 Aug 2020 12:14:54 -0500 Received: from uda0131933.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 075HEWMO101104; Wed, 5 Aug 2020 12:14:52 -0500 From: Lokesh Vutla To: CC: Sekhar Nori , Lokesh Vutla , Suman Anna , Vignesh R Subject: [PATCH v2 09/19] arm: mach-k3: j7200: Add support for SOC detection Date: Wed, 5 Aug 2020 22:44:21 +0530 Message-ID: <20200805171431.5737-10-lokeshvutla@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200805171431.5737-1-lokeshvutla@ti.com> References: <20200805171431.5737-1-lokeshvutla@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean The J7200 SoC is a part of the K3 Multicore SoC architecture platform. It is targeted for automotive gateway, vehicle compute systems, Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications. The SoC aims to meet the complex processing needs of modern embedded products. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, two clusters of lockstep capable dual Cortex-R5F MCUs and a Centralized Device Management and Security Controller (DMSC). * Configurable L3 Cache and IO-coherent architecture with high data throughput capable distributed DMA architecture under NAVSS. * Integrated Ethernet switch supporting up to a total of 4 external ports in addition to legacy Ethernet switch of up to 2 ports. * Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems, 20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and I2C, eCAP/eQEP, eHRPWM among other peripherals. * One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL management. See J7200 Technical Reference Manual (SPRUIU1, June 2020) for further details: https://www.ti.com/lit/pdf/spruiu1 Add support for detection J7200 SoC Signed-off-by: Lokesh Vutla Signed-off-by: Suman Anna --- arch/arm/mach-k3/common.c | 10 ++++++++++ arch/arm/mach-k3/common.h | 1 + arch/arm/mach-k3/include/mach/sys_proto.h | 1 + 3 files changed, 12 insertions(+) diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index 4e366f8fff..f4d7c3d71e 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -355,6 +355,16 @@ bool soc_is_j721e(void) return soc == J721E; } +bool soc_is_j7200(void) +{ + u32 soc; + + soc = (readl(CTRLMMR_WKUP_JTAG_ID) & + JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT; + + return soc == J7200; +} + #ifdef CONFIG_ARM64 void board_prep_linux(bootm_headers_t *images) { diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h index 9c6c3595a2..32d07340bf 100644 --- a/arch/arm/mach-k3/common.h +++ b/arch/arm/mach-k3/common.h @@ -9,6 +9,7 @@ #include #define J721E 0xbb64 +#define J7200 0xbb6d struct fwl_data { const char *name; diff --git a/arch/arm/mach-k3/include/mach/sys_proto.h b/arch/arm/mach-k3/include/mach/sys_proto.h index 48b11178c3..60287b261c 100644 --- a/arch/arm/mach-k3/include/mach/sys_proto.h +++ b/arch/arm/mach-k3/include/mach/sys_proto.h @@ -17,5 +17,6 @@ void release_resources_for_core_shutdown(void); int fdt_disable_node(void *blob, char *node_path); bool soc_is_j721e(void); +bool soc_is_j7200(void); #endif