diff --git a/board/freescale/common/qixis.h b/board/freescale/common/qixis.h
index c11062e..ac5abc3 100644
--- a/board/freescale/common/qixis.h
+++ b/board/freescale/common/qixis.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2011 Freescale Semiconductor
+ * Copyright 2020 NXP
  * Author: Shengzhou Liu <Shengzhou.Liu@freescale.com>
  *
  * This file provides support for the QIXIS of some Freescale reference boards.
@@ -115,7 +116,6 @@ void qixis_write_i2c(unsigned int reg, u8 value);
 #endif
 
 /* Use for SDHC adapter card type identification and operation */
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
 #define QIXIS_SDID_MASK                         0x07
 #define QIXIS_ESDHC_ADAPTER_TYPE_EMMC45         0x1	/* eMMC Card Rev4.5 */
 #define QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY   0x2	/* SD/MMC Legacy Card */
@@ -131,6 +131,5 @@ void qixis_write_i2c(unsigned int reg, u8 value);
 #define QIXIS_DAT4		0X01
 
 #define QIXIS_EVDD_BY_SDHC_VS	0x0c
-#endif
 
 #endif
diff --git a/board/freescale/t1040qds/t1040qds.c b/board/freescale/t1040qds/t1040qds.c
index cf38d84..18eb395 100644
--- a/board/freescale/t1040qds/t1040qds.c
+++ b/board/freescale/t1040qds/t1040qds.c
@@ -131,6 +131,33 @@ static void qe_board_setup(void)
 	}
 }
 
+static void esdhc_adapter_card_ident(void)
+{
+	u8 card_id, value;
+
+	card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
+
+	switch (card_id) {
+	case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
+		value = QIXIS_READ(brdcfg[5]);
+		value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);
+		QIXIS_WRITE(brdcfg[5], value);
+		break;
+	case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
+		value = QIXIS_READ(pwr_ctl[1]);
+		value |= QIXIS_EVDD_BY_SDHC_VS;
+		QIXIS_WRITE(pwr_ctl[1], value);
+		break;
+	case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
+		value = QIXIS_READ(brdcfg[5]);
+		value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);
+		QIXIS_WRITE(brdcfg[5], value);
+		break;
+	default:
+		break;
+	}
+}
+
 int board_early_init_f(void)
 {
 #if defined(CONFIG_DEEP_SLEEP)
@@ -170,7 +197,7 @@ int board_early_init_r(void)
 		0, flash_esel, BOOKE_PAGESZ_256M, 1);
 #endif
 	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
-
+	esdhc_adapter_card_ident();
 	return 0;
 }
 
diff --git a/board/freescale/t208xqds/t208xqds.c b/board/freescale/t208xqds/t208xqds.c
index 4d980e1..88169ae 100644
--- a/board/freescale/t208xqds/t208xqds.c
+++ b/board/freescale/t208xqds/t208xqds.c
@@ -345,6 +345,33 @@ int brd_mux_lane_to_slot(void)
 	return 0;
 }
 
+static void esdhc_adapter_card_ident(void)
+{
+	u8 card_id, value;
+
+	card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
+
+	switch (card_id) {
+	case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
+		value = QIXIS_READ(brdcfg[5]);
+		value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);
+		QIXIS_WRITE(brdcfg[5], value);
+		break;
+	case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
+		value = QIXIS_READ(pwr_ctl[1]);
+		value |= QIXIS_EVDD_BY_SDHC_VS;
+		QIXIS_WRITE(pwr_ctl[1], value);
+		break;
+	case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
+		value = QIXIS_READ(brdcfg[5]);
+		value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);
+		QIXIS_WRITE(brdcfg[5], value);
+		break;
+	default:
+		break;
+	}
+}
+
 int board_early_init_r(void)
 {
 	const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
@@ -384,7 +411,7 @@ int board_early_init_r(void)
 
 	brd_mux_lane_to_slot();
 	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
-
+	esdhc_adapter_card_ident();
 	return 0;
 }
 
diff --git a/doc/README.fsl-esdhc b/doc/README.fsl-esdhc
index 29cc661..b620625 100644
--- a/doc/README.fsl-esdhc
+++ b/doc/README.fsl-esdhc
@@ -1,19 +1,5 @@
 Freescale esdhc-specific options
 
-	- CONFIG_FSL_ESDHC_ADAPTER_IDENT
-		Support Freescale adapter card type identification. This is implemented by
-		operating Qixis FPGA relevant registers. The STAT_PRES1 register has SDHC
-		Card ID[0:2] bits showing the type of card installed in the SDHC Adapter Slot.
-
-		SDHC Card ID[0:2]	Adapter Card Type
-		0b000			reserved
-		0b001			eMMC Card Rev4.5
-		0b010			SD/MMC Legacy Card
-		0b011			eMMC Card Rev4.4
-		0b100			reserved
-		0b101			MMC Card
-		0b110			SD Card Rev2.0/3.0
-		0b111			No card is present
 	- CONFIG_SYS_FSL_ESDHC_LE
 		ESDHC IP is in little-endian mode. Accessing ESDHC registers can be
 		determined by ESDHC IP's endian mode or processor's endian mode.
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 38cbca1..d99e8ee 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -671,44 +671,6 @@ static void fsl_esdhc_get_cfg_common(struct fsl_esdhc_priv *priv,
 	cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
 }
 
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
-void mmc_adapter_card_type_ident(void)
-{
-	u8 card_id;
-	u8 value;
-
-	card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
-
-	switch (card_id) {
-	case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
-		value = QIXIS_READ(brdcfg[5]);
-		value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);
-		QIXIS_WRITE(brdcfg[5], value);
-		break;
-	case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
-		value = QIXIS_READ(pwr_ctl[1]);
-		value |= QIXIS_EVDD_BY_SDHC_VS;
-		QIXIS_WRITE(pwr_ctl[1], value);
-		break;
-	case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
-		value = QIXIS_READ(brdcfg[5]);
-		value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);
-		QIXIS_WRITE(brdcfg[5], value);
-		break;
-	case QIXIS_ESDHC_ADAPTER_TYPE_RSV:
-		break;
-	case QIXIS_ESDHC_ADAPTER_TYPE_MMC:
-		break;
-	case QIXIS_ESDHC_ADAPTER_TYPE_SD:
-		break;
-	case QIXIS_ESDHC_NO_ADAPTER:
-		break;
-	default:
-		break;
-	}
-}
-#endif
-
 #ifdef CONFIG_OF_LIBFDT
 __weak int esdhc_status_fixup(void *blob, const char *compat)
 {
diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index c5b7872..90690c8 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2015 Google, Inc
+ * Copyright 2020 NXP
  * Written by Simon Glass <sjg@chromium.org>
  */
 
@@ -309,9 +310,6 @@ void mmc_do_preinit(void)
 
 		if (!m)
 			continue;
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
-		mmc_set_preinit(m, 1);
-#endif
 		if (m->preinit)
 			mmc_start_init(m);
 	}
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 620bb93..2bd1f02 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2008, Freescale Semiconductor, Inc
+ * Copyright 2020 NXP
  * Andy Fleming
  *
  * Based vaguely on the Linux code
@@ -2777,9 +2778,6 @@ int mmc_get_op_cond(struct mmc *mmc)
 	if (mmc->has_init)
 		return 0;
 
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
-	mmc_adapter_card_type_ident();
-#endif
 	err = mmc_power_init(mmc);
 	if (err)
 		return err;
@@ -3061,9 +3059,6 @@ int mmc_init_device(int num)
 	m = mmc_get_mmc_dev(dev);
 	if (!m)
 		return 0;
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
-	mmc_set_preinit(m, 1);
-#endif
 	if (m->preinit)
 		mmc_start_init(m);
 
diff --git a/drivers/mmc/mmc_legacy.c b/drivers/mmc/mmc_legacy.c
index 2bb12ce..a05da6c 100644
--- a/drivers/mmc/mmc_legacy.c
+++ b/drivers/mmc/mmc_legacy.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2016 Google, Inc
+ * Copyright 2020 NXP
  * Written by Simon Glass <sjg@chromium.org>
  */
 
@@ -23,9 +24,6 @@ struct mmc *find_mmc_device(int dev_num)
 void mmc_do_preinit(void)
 {
 	struct mmc *m = &mmc_static;
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
-	mmc_set_preinit(m, 1);
-#endif
 	if (m->preinit)
 		mmc_start_init(m);
 }
@@ -77,9 +75,6 @@ void mmc_do_preinit(void)
 	list_for_each(entry, &mmc_devices) {
 		m = list_entry(entry, struct mmc, link);
 
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
-		mmc_set_preinit(m, 1);
-#endif
 		if (m->preinit)
 			mmc_start_init(m);
 	}
diff --git a/drivers/mmc/mmc_private.h b/drivers/mmc/mmc_private.h
index 35170d0..a0900e8 100644
--- a/drivers/mmc/mmc_private.h
+++ b/drivers/mmc/mmc_private.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2008,2010 Freescale Semiconductor, Inc
+ * Copyright 2020 NXP
  * Andy Fleming
  *
  * Based (loosely) on the Linux code
@@ -16,9 +17,6 @@ int mmc_send_status(struct mmc *mmc, unsigned int *status);
 int mmc_poll_for_busy(struct mmc *mmc, int timeout);
 
 int mmc_set_blocklen(struct mmc *mmc, int len);
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
-void mmc_adapter_card_type_ident(void);
-#endif
 
 #if CONFIG_IS_ENABLED(BLK)
 ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 7ad018b..0fc0228 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -488,7 +488,6 @@ unsigned long get_board_ddr_clk(void);
 
 #ifdef CONFIG_MMC
 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
-#define CONFIG_FSL_ESDHC_ADAPTER_IDENT
 #endif
 
 /* Qman/Bman */
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index c54f7f5..081672c 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -637,7 +637,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_FSL_ESDHC_ADDR	CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#define CONFIG_FSL_ESDHC_ADAPTER_IDENT
 #endif
 
 /*
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index e148eaa..fdf5855 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -16,10 +16,6 @@
 /* needed for the mmc_cfg definition */
 #include <mmc.h>
 
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
-#include "../board/freescale/common/qixis.h"
-#endif
-
 /* FSL eSDHC-specific constants */
 #define SYSCTL			0x0002e02c
 #define SYSCTL_INITA		0x08000000
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index f6bf6f2..d31f1e2 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -556,7 +556,6 @@ CONFIG_FSL_DIU_CH7301
 CONFIG_FSL_DIU_FB
 CONFIG_FSL_DMA
 CONFIG_FSL_DSPI1
-CONFIG_FSL_ESDHC_ADAPTER_IDENT
 CONFIG_FSL_ESDHC_PIN_MUX
 CONFIG_FSL_FIXED_MMC_LOCATION
 CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
