From patchwork Thu Jun 11 08:17:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 1307512 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=default header.b=2i7SKkax; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49jNFG4cJrz9sRN for ; Thu, 11 Jun 2020 22:18:58 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 660BA81CD6; Thu, 11 Jun 2020 14:18:32 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="2i7SKkax"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 081598179D; Thu, 11 Jun 2020 10:17:26 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 530108168F for ; Thu, 11 Jun 2020 10:17:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ardb@kernel.org Received: from localhost.localdomain (amontpellier-657-1-18-247.w109-210.abo.wanadoo.fr [109.210.65.247]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C96D120812; Thu, 11 Jun 2020 08:17:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1591863440; bh=qU1nlmnPwygG9WrZJyjJGo+wo4mFclkQUL7uefpYBRo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=2i7SKkaxyJYspNvS43+nI5Q0Ie7pmkyBjINrYbHEhUD7vg8/LaoaE74Kl2ynUfSbx rSSd7P8lYrVaJOGObciY+SspFtXKADIl6WaIuIzNvmrQpp7baVQRg9D6yxXw1ysEdK z9eu3ghS/i6oUjhIjxIykMWDeXxZO2H5Z3wviL38= From: Ard Biesheuvel To: u-boot@lists.denx.de Cc: Ard Biesheuvel , Tom Rini , Andre Przywara , Heinrich Schuchardt , Tuomas Tynkkynen Subject: [PATCH v2 2/5] arm: qemu: enable LPAE on 32-bit Date: Thu, 11 Jun 2020 10:17:04 +0200 Message-Id: <20200611081707.195994-3-ardb@kernel.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200611081707.195994-1-ardb@kernel.org> References: <20200611081707.195994-1-ardb@kernel.org> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 11 Jun 2020 14:18:25 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean QEMU's mach-virt machine only supports selecting CPU models that implement the virtualization extensions, and are therefore guaranteed to support LPAE as well. Initially, QEMU would not allow emulating these CPUs running in HYP mode (or EL2, for AArch64), but today, it also contains a complete implementation of the virtualization extensions themselves. This means we could be running U-Boot in HYP mode, in which case the LPAE long descriptor page table format is the only format that is supported. If we are not running in HYP mode, we can use either. So let's enable CONFIG_ARMV7_LPAE for qemu_arm_defconfig so that we get the best support for running with the MMU and caches enabled at any privilege level. Signed-off-by: Ard Biesheuvel Acked-by: Heinrich Schuchardt --- configs/qemu_arm_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index a8473988bd76..75bdce7708c7 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARM_SMCCC=y +CONFIG_ARMV7_LPAE=y CONFIG_ARCH_QEMU=y CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_SECT_SIZE=0x40000