From patchwork Thu Jun 4 12:44:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pratyush Yadav X-Patchwork-Id: 1303512 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=aIcxVHWv; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49d5DY6X8Cz9sSc for ; Thu, 4 Jun 2020 22:48:29 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C82F281CC9; Thu, 4 Jun 2020 14:45:49 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="aIcxVHWv"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 5DED281C9C; Thu, 4 Jun 2020 14:45:39 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id F1644819A1 for ; Thu, 4 Jun 2020 14:45:35 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=p.yadav@ti.com Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 054CjS6F062941; Thu, 4 Jun 2020 07:45:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1591274728; bh=EnPMZvQiY8kelcWC3WMwYStCe0yX4z1zvNItmGZk0Us=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=aIcxVHWvIscw2oqNC5dcT9DRjyVGO7JOV4I5xz9L4ZEkWrgeQSbIG3Lf0aFBbSUvj JwcrudYgpu2Vjt0S9Aj/EJuqo5h/sOf93qjb3Qn5qhHjHiGqz5B9QP9jssrjbI6hFs edFq3gh/Pnlumat7p5rjlf0MU0vv+GrUEUssOwrQ= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 054CjS96113735; Thu, 4 Jun 2020 07:45:28 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 4 Jun 2020 07:45:27 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 4 Jun 2020 07:45:27 -0500 Received: from pratyush-OptiPlex-790.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 054CicBe004409; Thu, 4 Jun 2020 07:45:25 -0500 From: Pratyush Yadav To: Chris Packham , Jagan Teki , Vignesh R , Ryder Lee , Weijie Gao , GSS_MTK_Uboot_upstream , CC: Pratyush Yadav , Sekhar Nori , "Tan, Ley Foon" Subject: [PATCH v5 14/21] mtd: spi-nor-core: Prepare Read SR and FSR for Octal DTR mode Date: Thu, 4 Jun 2020 18:14:31 +0530 Message-ID: <20200604124438.16783-15-p.yadav@ti.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200604124438.16783-1-p.yadav@ti.com> References: <20200604124438.16783-1-p.yadav@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean The xSPI Profile 1.0 table specifies how many dummy cycles and address bytes are needed for the Read Status Register command in Octal DTR mode. Use that information to send the correct Read SR command. Some controllers might have trouble reading just 1 byte in DTR mode. So, when we are in DTR mode read 2 bytes and discard the second. This shows no side effects with the two flashes I tested: Micron mt35xu512aba and Cypress s28hs512t. Update Read FSR to mimic Read SR because they share the same characteristics. Signed-off-by: Pratyush Yadav --- drivers/mtd/spi/spi-nor-core.c | 60 ++++++++++++++++++++++++++++++---- 1 file changed, 54 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 0c85cc88a6..743a07c5ec 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -375,16 +375,40 @@ static ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, */ static int read_sr(struct spi_nor *nor) { + struct spi_mem_op op; int ret; - u8 val; + u8 val[2]; + u8 addr_nbytes, dummy; - ret = nor->read_reg(nor, SPINOR_OP_RDSR, &val, 1); + if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) { + addr_nbytes = nor->rdsr_addr_nbytes; + dummy = nor->rdsr_dummy; + } else { + addr_nbytes = 0; + dummy = 0; + } + + op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 1), + SPI_MEM_OP_ADDR(addr_nbytes, 0, 1), + SPI_MEM_OP_DUMMY(dummy, 1), + SPI_MEM_OP_DATA_IN(1, NULL, 1)); + + spi_nor_setup_op(nor, &op, nor->reg_proto); + + /* + * We don't want to read only one byte in DTR mode. So, read 2 and then + * discard the second byte. + */ + if (spi_nor_protocol_is_dtr(nor->reg_proto)) + op.data.nbytes = 2; + + ret = spi_nor_read_write_reg(nor, &op, val); if (ret < 0) { pr_debug("error %d reading SR\n", (int)ret); return ret; } - return val; + return *val; } /* @@ -394,16 +418,40 @@ static int read_sr(struct spi_nor *nor) */ static int read_fsr(struct spi_nor *nor) { + struct spi_mem_op op; int ret; - u8 val; + u8 val[2]; + u8 addr_nbytes, dummy; - ret = nor->read_reg(nor, SPINOR_OP_RDFSR, &val, 1); + if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) { + addr_nbytes = nor->rdsr_addr_nbytes; + dummy = nor->rdsr_dummy; + } else { + addr_nbytes = 0; + dummy = 0; + } + + op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDFSR, 1), + SPI_MEM_OP_ADDR(addr_nbytes, 0, 1), + SPI_MEM_OP_DUMMY(dummy, 1), + SPI_MEM_OP_DATA_IN(1, NULL, 1)); + + spi_nor_setup_op(nor, &op, nor->reg_proto); + + /* + * We don't want to read only one byte in DTR mode. So, read 2 and then + * discard the second byte. + */ + if (spi_nor_protocol_is_dtr(nor->reg_proto)) + op.data.nbytes = 2; + + ret = spi_nor_read_write_reg(nor, &op, val); if (ret < 0) { pr_debug("error %d reading FSR\n", ret); return ret; } - return val; + return *val; } /*