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Wed, 3 Jun 2020 12:44:05 +0000 (GMT) From: Marek Szyprowski To: u-boot@lists.denx.de Cc: Marek Szyprowski , Matthias Brugger , Tom Rini , Sylwester Nawrocki , Wolfgang Denk , Marek Vasut , Bin Meng , Nicolas Saenz Julienne , Simon Glass , Jaehoon Chung , Bartlomiej Zolnierkiewicz Subject: [PATCH v5 3/6] arm: provide a function for boards init code to modify MMU virtual-physical map Date: Wed, 3 Jun 2020 14:43:42 +0200 Message-Id: <20200603124345.18595-4-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200603124345.18595-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrEKsWRmVeSWpSXmKPExsWy7djPc7pis6/HGZy5wmaxccZ6VoupPfEW N361sVqsPXKX3eJNWyOjxYLJT1gtts1azmZx+E07q8W3LdsYLaZO2sxu8XZvJ7vF5IevGB14 PGY3XGTxmDfrBIvHzll32T1eHVjF7nH2zg5Gj74tqxg91m+5yuKx+XR1AEcUl01Kak5mWWqR vl0CV8a36WeYC17IVUz508zUwHhYsouRk0NCwESi69AR5i5GLg4hgRWMEsumb2eEcL4wSkw9 vBXK+cwo0XtvDitMy995t9ggEssZJabfXc0M13L7xBlGkCo2AUOJrrddbCC2iICExK/+q2Cj mAW2MEvMmvcOqIODQ1ggU2LmbCuQGhYBVYmXt9vBenkFbCUut35mgdgmL7F6wwFmEJtTwE7i /7ZNrCBzJATWsUtc6l3FCDJHQsBF4uSXIoh6YYlXx7ewQ9gyEv93zmeCqG9mlHh4bi07hNPD KHG5aQYjRJW1xJ1zv9hABjELaEqs36UPEXaUmH3oARvEfD6JG28FQcLMQOakbdOZIcK8Eh1t QhDVahKzjq+DW3vwwiWoEg+Ja98VIcEzkVGidfIKlgmM8rMQdi1gZFzFKJ5aWpybnlpsnJda rlecmFtcmpeul5yfu4kRmHJO/zv+dQfjvj9JhxgFOBiVeHgZ6q7HCbEmlhVX5h5ilOBgVhLh dTp7Ok6INyWxsiq1KD++qDQntfgQozQHi5I4r/Gil7FCAumJJanZqakFqUUwWSYOTqkGxsyv 86IFzy7R2/BGOIs/Nlc3fd+LyxNTN7jvnm39xuu31CXzzixV7eITuy998XyvuVy1JSIiZY/N RY4HjEFfVrLGLPFx8psn0p27X35tUmp1l1bZrC+mpq8N9vG8MFzEkVy4u3HijbAi2bSWRy+6 xO4wKEcY7v+U+8rl51ZBwwqN/nUzzfclKbEUZyQaajEXFScCAIX97+c1AwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmphkeLIzCtJLcpLzFFi42I5/e/4XV3R2dfjDL5M1bHYOGM9q8XUnniL G7/aWC3WHrnLbvGmrZHRYsHkJ6wW22YtZ7M4/Kad1eLblm2MFlMnbWa3eLu3k91i8sNXjA48 HrMbLrJ4zJt1gsVj56y77B6vDqxi9zh7ZwejR9+WVYwe67dcZfHYfLo6gCNKz6Yov7QkVSEj v7jEVina0MJIz9DSQs/IxFLP0Ng81srIVEnfziYlNSezLLVI3y5BL+Pb9DPMBS/kKqb8aWZq YDws2cXIySEhYCLxd94tti5GLg4hgaWMEme3TGGGSMhInJzWwAphC0v8udYFVfSJUWLX7P/s IAk2AUOJrrcgCU4OEQEJiV/9VxlBipgF9jBLPH19iQkkISyQLrH6UAMjiM0ioCrx8nY7mM0r YCtxufUzC8QGeYnVGw6AbeYUsJP4v20T0GYOoG22EufvOk1g5FvAyLCKUSS1tDg3PbfYUK84 Mbe4NC9dLzk/dxMjMAa2Hfu5eQfjpY3BhxgFOBiVeHgZ6q7HCbEmlhVX5h5ilOBgVhLhdTp7 Ok6INyWxsiq1KD++qDQntfgQoynQTROZpUST84HxmVcSb2hqaG5haWhubG5sZqEkztshcDBG SCA9sSQ1OzW1ILUIpo+Jg1OqgbHQcf2/Zb+Oxi0yC2Ldm6GxTICt4fBV5X3xL35Kt9xo6baJ 81Fa9Kq/cfOd1t1XMrdsq1W02eY62cs9J+2IlcCFH8GcNzOfaBvVvXyiYz9Je/0LddZt7Bq7 LF4rzMm9cN3l1pWYZ+oVc5I8Vr0wXrTTwr5twgHtKS1LPmY/uN3SFrT61MUZbNuUWIozEg21 mIuKEwHiZy6slwIAAA== X-CMS-MailID: 20200603124405eucas1p18b8d5eb55cac3bf2b17b0309304947c1 X-Msg-Generator: CA X-RootMTR: 20200603124405eucas1p18b8d5eb55cac3bf2b17b0309304947c1 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20200603124405eucas1p18b8d5eb55cac3bf2b17b0309304947c1 References: <20200603124345.18595-1-m.szyprowski@samsung.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean Provide function for setting arbitrary virtual-physical MMU mapping and cache settings for the given region. Signed-off-by: Marek Szyprowski Reviewed-by: Tom Rini --- arch/arm/include/asm/mmu.h | 8 ++++++++ arch/arm/include/asm/system.h | 13 +++++++++++++ arch/arm/lib/cache-cp15.c | 24 ++++++++++++++++++------ 3 files changed, 39 insertions(+), 6 deletions(-) create mode 100644 arch/arm/include/asm/mmu.h diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h new file mode 100644 index 0000000..9ac16f5 --- /dev/null +++ b/arch/arm/include/asm/mmu.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __ASM_ARM_MMU_H +#define __ASM_ARM_MMU_H + +void init_addr_map(void); + +#endif diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 63649ed..5d3b6d0 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -585,6 +585,19 @@ s32 psci_features(u32 function_id, u32 psci_fid); void save_boot_params_ret(void); /** + * mmu_set_region_dcache_behaviour_phys() - set virt/phys mapping + * + * Change the virt/phys mapping and cache settings for a region. + * + * @virt: virtual start address of memory region to change + * @phys: physical address for the memory region to set + * @size: size of memory region to change + * @option: dcache option to select + */ +void mmu_set_region_dcache_behaviour_phys(phys_addr_t virt, phys_addr_t phys, + size_t size, enum dcache_option option); + +/** * mmu_set_region_dcache_behaviour() - set cache settings * * Change the cache settings for a region. diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 1da2e92..3971761 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -25,7 +25,8 @@ __weak void arm_init_domains(void) { } -void set_section_dcache(int section, enum dcache_option option) +static void set_section_phys(int section, phys_addr_t phys, + enum dcache_option option) { #ifdef CONFIG_ARMV7_LPAE u64 *page_table = (u64 *)gd->arch.tlb_addr; @@ -37,7 +38,7 @@ void set_section_dcache(int section, enum dcache_option option) #endif /* Add the page offset */ - value |= ((u32)section << MMU_SECTION_SHIFT); + value |= phys; /* Add caching bits */ value |= option; @@ -46,13 +47,18 @@ void set_section_dcache(int section, enum dcache_option option) page_table[section] = value; } +void set_section_dcache(int section, enum dcache_option option) +{ + set_section_phys(section, (u32)section << MMU_SECTION_SHIFT, option); +} + __weak void mmu_page_table_flush(unsigned long start, unsigned long stop) { debug("%s: Warning: not implemented\n", __func__); } -void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, - enum dcache_option option) +void mmu_set_region_dcache_behaviour_phys(phys_addr_t start, phys_addr_t phys, + size_t size, enum dcache_option option) { #ifdef CONFIG_ARMV7_LPAE u64 *page_table = (u64 *)gd->arch.tlb_addr; @@ -74,8 +80,8 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, debug("%s: start=%pa, size=%zu, option=0x%x\n", __func__, &start, size, option); #endif - for (upto = start; upto < end; upto++) - set_section_dcache(upto, option); + for (upto = start; upto < end; upto++, phys += MMU_SECTION_SIZE) + set_section_phys(upto, phys, option); /* * Make sure range is cache line aligned @@ -90,6 +96,12 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, mmu_page_table_flush(startpt, stoppt); } +void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, + enum dcache_option option) +{ + mmu_set_region_dcache_behaviour_phys(start, start, size, option); +} + __weak void dram_bank_mmu_setup(int bank) { bd_t *bd = gd->bd;