From patchwork Tue May 12 18:47:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sylwester Nawrocki X-Patchwork-Id: 1288733 X-Patchwork-Delegate: matthias.bgg@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=samsung.com header.i=@samsung.com header.a=rsa-sha256 header.s=mail20170921 header.b=Fm50fcBL; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49M6KV3jXsz9sRR for ; Wed, 13 May 2020 04:49:18 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 7663481CC1; Tue, 12 May 2020 20:48:44 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=samsung.com header.i=@samsung.com header.b="Fm50fcBL"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 497CE81CE3; Tue, 12 May 2020 20:48:41 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 53C8F81CD9 for ; Tue, 12 May 2020 20:48:38 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=s.nawrocki@samsung.com Received: from eucas1p1.samsung.com (unknown [182.198.249.206]) by mailout1.w1.samsung.com (KnoxPortal) with ESMTP id 20200512184838euoutp019e25bda09342202a0eda043f595e3c22~OXGd7TgBd0706107061euoutp01m for ; Tue, 12 May 2020 18:48:38 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout1.w1.samsung.com 20200512184838euoutp019e25bda09342202a0eda043f595e3c22~OXGd7TgBd0706107061euoutp01m DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1589309318; bh=HzMTU/TXuht/pqPHaK0Ik2xR+VGQDcf9rtO4VMSyKJM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Fm50fcBLGZyjlJzMo4Jk2kL21fNnnNiYQPGuvZ9uYJHcoSJzOfuJZKLNBoAFhG6Q1 7NBIjapXv/0ZFqIcyF8vg14dGk5aNjSHNtjyeLaSxxf0+jcM23co7gshLtNg2WB2Jv 1m1YEKUU/fA0BznXct760bitBngMWoUq+d7qDQHM= Received: from eusmges3new.samsung.com (unknown [203.254.199.245]) by eucas1p1.samsung.com (KnoxPortal) with ESMTP id 20200512184836eucas1p1135921d83070d86d6e8b1bb64b8f8be4~OXGczeB0p2080520805eucas1p1w; Tue, 12 May 2020 18:48:36 +0000 (GMT) Received: from eucas1p2.samsung.com ( [182.198.249.207]) by eusmges3new.samsung.com (EUCPMTA) with SMTP id 7F.03.60698.48FEABE5; Tue, 12 May 2020 19:48:36 +0100 (BST) Received: from eusmtrp2.samsung.com (unknown [182.198.249.139]) by eucas1p2.samsung.com (KnoxPortal) with ESMTPA id 20200512184836eucas1p2f357a332cd99d6e287a74405d75c0985~OXGcRwgxc0943909439eucas1p25; Tue, 12 May 2020 18:48:36 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eusmtrp2.samsung.com (KnoxPortal) with ESMTP id 20200512184836eusmtrp2d133993e54b8ae3b6e45209e4cf24ca5~OXGcRC2XF1654116541eusmtrp2q; Tue, 12 May 2020 18:48:36 +0000 (GMT) X-AuditID: cbfec7f5-a0fff7000001ed1a-92-5ebaef84302e Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 64.F8.07950.48FEABE5; Tue, 12 May 2020 19:48:36 +0100 (BST) Received: from AMDC3061.digital.local (unknown [106.120.51.75]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20200512184835eusmtip109d2fc69bebbcdfc5800da0da0dc6fc3~OXGbx_UD72778327783eusmtip1W; Tue, 12 May 2020 18:48:35 +0000 (GMT) From: Sylwester Nawrocki To: u-boot@lists.denx.de, mbrugger@suse.com, marex@denx.de, bmeng.cn@gmail.com Cc: james.quinlan@broadcom.com, nsaenzjulienne@suse.de, sjg@chromium.org, jh80.chung@samsung.com, m.szyprowski@samsung.com, b.zolnierkie@samsung.com, Sylwester Nawrocki Subject: [PATCH v3 7/9] pci: Add some PCI Express capability register offset definitions Date: Tue, 12 May 2020 20:47:14 +0200 Message-Id: <20200512184716.2869-8-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200512184716.2869-1-s.nawrocki@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0WSfUhTURjGObt323U6uV4FDysQhoUFaaLgJUUqpW4QaP1lxrSZFzXnB7vT siBXyTS/MXQyQ6dBs6lpOYabzGqls0Qtxa9STDHF0kLLcqYt59X67/c+53nO+3A4GELUckVY SrqClqdLZWKeADX22AeP5H0zxx1VLviTT6pbuWRlcTxpWSrjkeMbKi7Z8mqKTy6pbgFSe2+O Sxo1Oh75cimfS/40GAG5bLnLP+5Kaab7eVSN8h1K1Wp6UcqkmeJT/ZMdgCo16AHVahhBqfa+ G9FYrCAskZalZNPygPBLguTBolkks8v9mvK1GlGCdddC4IJBPBh+LankFwIBRuCNAFavlvHY 4QeAM58+ok4XgX8HULUQtZeoaejisCYdgGrdEPdfQmfJ5zhdPDwQlnSXAid74dFw1F4FnCYE 7waw+dnmzrWeeCwsGOjdCaD4AWhvuo84WYgfg1vvGzjsOh/Y1PZ8R3fBQ+FYew/C6g/5cP6B H8uRcO2LhceyJ/xsM/BZ3g8dprqdqhC/A2Bx5wc+O5QDOG3TAtYVCicHNrbT2Ha9Q7DVHMDK J+DKozXglCHuDseXPZwyso0VRjXCykJYoCJYty/8rVfvVhbBojkHyjIF+yre7j5pKYCWF/1o OfDR/F+mBUAPvOksJi2JZoLS6av+jDSNyUpP8r+ckfYUbP+avj+2tQ7QtZlgBTgGxG7CmFxz HMGVZjM5aVYAMUTsJcxLMcURwkRpznVanhEvz5LRjBXsw1CxtzCoYVFC4ElSBZ1K05m0fO+U g7mIlOCg92jfROiKbSLLrf4cdabRivg9doQREZ0z4cGySNFJ02xeSU3RWcEUNbKuNtd7RNAJ FaYW/akoEedmSArhMNpDtAXJt+fDJb+ar2z4etddOJ9rLpD0SqrGKmN835we2qoYlcQr/Vwj U1eNwQp1m+bicEeTTr94UVESmz8cJ0aZZGngYUTOSP8C7G85NjEDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrPLMWRmVeSWpSXmKPExsVy+t/xu7ot73fFGTRO47HYOGM9q8XUnniL vW/62Sxu/GpjtVh75C67xZu2RkaLBZOfsFpsm7WczeLwm3ZWi29btjFavN3bye7A7THr/lk2 j9kNF1k85s06weKxc9Zddo+zd3YwevRtWcXosX7LVRaPzaerAzii9GyK8ktLUhUy8otLbJWi DS2M9AwtLfSMTCz1DI3NY62MTJX07WxSUnMyy1KL9O0S9DLOdz9iLtjHV9FwcjpzA+MP7i5G Tg4JAROJ2Yv2MXUxcnEICSxllHj+p5+ti5EDKCElMb9FCaJGWOLPtS42iJpPjBITXm1gBEmw CRhK9B7tA7NFBEIkXhy9AjaIWeAso8Sizg+sIAlhgQiJHXOusoDYLAKqEj9Xz2EGsXkFrCT+ 3lrEBLFBXmL1hgNgcU4Ba4nrm4+B2UJANXu+vWObwMi3gJFhFaNIamlxbnpusZFecWJucWle ul5yfu4mRmDgbzv2c8sOxq53wYcYBTgYlXh4I+p3xQmxJpYVV+YeYpTgYFYS4W3J3BknxJuS WFmVWpQfX1Sak1p8iNEU6KiJzFKiyfnAqMwriTc0NTS3sDQ0NzY3NrNQEuftEDgYIySQnliS mp2aWpBaBNPHxMEp1cCY/4XD7PPi+S+2KkXMPlP5dGW7dVZWdvNlA7N3Sw6+ZOOuq5RnEq38 /Hri8TyzzOI1Zop5dQadajuPpBekXn9f6P/3t+Mlo5d+fKvCcsUu+u4L59j6PlMo6vszCVXn A0d2PnB/kCX47mLjVS3XtoS1P7J82hflcfkF+dxsDLSex/XRxFGj5roSS3FGoqEWc1FxIgBl vUv9kgIAAA== X-CMS-MailID: 20200512184836eucas1p2f357a332cd99d6e287a74405d75c0985 X-Msg-Generator: CA X-RootMTR: 20200512184836eucas1p2f357a332cd99d6e287a74405d75c0985 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20200512184836eucas1p2f357a332cd99d6e287a74405d75c0985 References: <20200512184716.2869-1-s.nawrocki@samsung.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean Add PCI Express capability definitions required by the Broadcom STB PCIe controller driver. Signed-off-by: Sylwester Nawrocki Reviewed-by: Bin Meng Reviewed-by: Nicolas Saenz Julienne --- Changes since v2: - added Current Link Speed defines. Changes since v1: - none. Changes since RFC: - ensure the entries are added in order, sorted by ascending address values. --- include/pci.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/pci.h b/include/pci.h index dfdbb32..ff5f620 100644 --- a/include/pci.h +++ b/include/pci.h @@ -479,11 +479,20 @@ #define PCI_EXP_DEVCTL 8 /* Device Control */ #define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ #define PCI_EXP_LNKCAP 12 /* Link Capabilities */ +#define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */ +#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */ #define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ #define PCI_EXP_LNKSTA 18 /* Link Status */ +#define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */ +#define PCI_EXP_LNKSTA_CLS_2_5GB 0x0001 /* Current Link Speed 2.5GT/s */ +#define PCI_EXP_LNKSTA_CLS_5_0GB 0x0002 /* Current Link Speed 5.0GT/s */ +#define PCI_EXP_LNKSTA_CLS_8_0GB 0x0003 /* Current Link Speed 8.0GT/s */ +#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */ +#define PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */ #define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ #define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ #define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ +#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */ /* Include the ID list */