From patchwork Thu May 7 13:12:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 1285254 X-Patchwork-Delegate: yamada.m@jp.panasonic.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=socionext.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nifty.com header.i=@nifty.com header.a=rsa-sha256 header.s=dec2015msa header.b=T1XzHqZy; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49Hv5B0wrTz9sSc for ; Thu, 7 May 2020 23:12:29 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 406FC81D80; Thu, 7 May 2020 15:12:27 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=socionext.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=nifty.com header.i=@nifty.com header.b="T1XzHqZy"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 668FD82321; Thu, 7 May 2020 15:12:25 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_MSPIKE_BL,RCVD_IN_MSPIKE_L3,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from conuserg-08.nifty.com (conuserg-08.nifty.com [210.131.2.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 03EA481D80 for ; Thu, 7 May 2020 15:12:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=socionext.com Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=yamada.masahiro@socionext.com Received: from oscar.flets-west.jp (softbank126090202047.bbtec.net [126.90.202.47]) (authenticated) by conuserg-08.nifty.com with ESMTP id 047DC5xJ025233; Thu, 7 May 2020 22:12:05 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-08.nifty.com 047DC5xJ025233 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1588857125; bh=uhzR9yc32oO4Y6FTKzGjMJFO8EwAGvMmiv96AtIfVhg=; h=From:To:Cc:Subject:Date:From; b=T1XzHqZyHFzaQ39/mlLoE80pI9s8+TAT4rb7huCdvOLQ2e7stAVime+MDujUsvK7z rCzd66UpBxY1+UBJBmer3xRg6PmlvCfN3Ub8NmiQ9tu4wQO7dIdR63RO1yxY8Wm/jA aIO6n/zcQDg2Xua5Rg0HPp1uGVZyAjU1o7FXiGYL+xYpwjTz9UyD0AzTAWEZzPSi81 L49Gyrq6EeGcwTOEhX+LwWtlFGxUapJKa40xWQJuIrzND8BzBugNdstTBP7Cp1SMWQ zadTLAJ9utdZkmrAq8PbvpXvRDf6Rm3vlY75YD1XrF9CTnwxAs1g5iKUO/P0bqCVxr bMNC0tBhUPUJg== X-Nifty-SrcIP: [126.90.202.47] From: Masahiro Yamada To: u-boot@lists.denx.de Cc: Masahiro Yamada , Miquel Raynal Subject: [PATCH] mtd: rawnand: denali: deassert write protect pin Date: Thu, 7 May 2020 22:12:00 +0900 Message-Id: <20200507131201.1361659-1-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean [ Linux commit 9afbe7c0140f663586edb6e823b616bd7076c00a ] If the write protect signal from this IP is connected to the NAND device, this IP can handle the WP# pin via the WRITE_PROTECT register. The Denali NAND Flash Memory Controller User's Guide describes this register like follows: When the controller is in reset, the WP# pin is always asserted to the device. Once the reset is removed, the WP# is de-asserted. The software will then have to come and program this bit to assert/de-assert the same. 1 - Write protect de-assert 0 - Write protect assert The default value is 1, so the write protect is de-asserted after the reset is removed. The driver can write to the device unless someone has explicitly cleared register before booting the kernel. The boot ROM of some UniPhier SoCs (LD4, Pro4, sLD8, Pro5) is the case; the boot ROM clears the WRITE_PROTECT register when the system is booting from the NAND device, so the NAND device becomes read-only. Set it to 1 in the driver in order to allow the write access to the device. Signed-off-by: Masahiro Yamada Signed-off-by: Miquel Raynal --- drivers/mtd/nand/raw/denali.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c index b525b1be54..f00f6c39e1 100644 --- a/drivers/mtd/nand/raw/denali.c +++ b/drivers/mtd/nand/raw/denali.c @@ -1089,6 +1089,7 @@ static void denali_hw_init(struct denali_nand_info *denali) iowrite32(CHIP_EN_DONT_CARE__FLAG, denali->reg + CHIP_ENABLE_DONT_CARE); iowrite32(0xffff, denali->reg + SPARE_AREA_MARKER); + iowrite32(WRITE_PROTECT__FLAG, denali->reg + WRITE_PROTECT); } int denali_calc_ecc_bytes(int step_size, int strength)