From patchwork Tue Apr 21 16:50:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sylwester Nawrocki X-Patchwork-Id: 1274444 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=samsung.com header.i=@samsung.com header.a=rsa-sha256 header.s=mail20170921 header.b=WrpEgeC1; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4969qX0gklz9sSJ for ; Wed, 22 Apr 2020 03:42:00 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id EEA2E81C76; Tue, 21 Apr 2020 19:41:00 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=samsung.com header.i=@samsung.com header.b="WrpEgeC1"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 5F23A811EC; Tue, 21 Apr 2020 18:51:24 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 15403811EC for ; Tue, 21 Apr 2020 18:51:19 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=s.nawrocki@samsung.com Received: from eucas1p2.samsung.com (unknown [182.198.249.207]) by mailout1.w1.samsung.com (KnoxPortal) with ESMTP id 20200421165118euoutp01eb9cb893b86512593aecaf9a2229fe2d~H49CKBnJp0962409624euoutp01V for ; Tue, 21 Apr 2020 16:51:18 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout1.w1.samsung.com 20200421165118euoutp01eb9cb893b86512593aecaf9a2229fe2d~H49CKBnJp0962409624euoutp01V DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1587487878; bh=KSIQabzU4eCsy6wbbJGuIQNoLGRG3kAK+Gl/QiVIJMs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WrpEgeC1CIx4w1CdlpymTRY8cl0+Ia9ijznf1+Z8UCa/CZFgB3/S/hqWZ6K2YjB2Y ge7GsvvD5BjmikoYnxVQvFdOp0lD+N7WkzMk+O7z59VTw5U6AIpnL5VzpiLdO7X8fs 5DI5tI15DScmUhhodpPMAQat42Uyw1S0vOTS/GVo= Received: from eusmges1new.samsung.com (unknown [203.254.199.242]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20200421165117eucas1p29a916cf9bbe2c32a300f5aaa8dfdb36b~H49BqkmUJ2629726297eucas1p2b; Tue, 21 Apr 2020 16:51:17 +0000 (GMT) Received: from eucas1p2.samsung.com ( [182.198.249.207]) by eusmges1new.samsung.com (EUCPMTA) with SMTP id C5.5D.61286.5842F9E5; Tue, 21 Apr 2020 17:51:17 +0100 (BST) Received: from eusmtrp2.samsung.com (unknown [182.198.249.139]) by eucas1p2.samsung.com (KnoxPortal) with ESMTPA id 20200421165117eucas1p220b0a5f7820c7cf7bae20dc693584ad4~H49A4JpFy2629726297eucas1p2a; Tue, 21 Apr 2020 16:51:17 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eusmtrp2.samsung.com (KnoxPortal) with ESMTP id 20200421165117eusmtrp29c22dabecb77d9c7b6eb9b0e54f6d365~H49A3fIX-3266732667eusmtrp2O; Tue, 21 Apr 2020 16:51:17 +0000 (GMT) X-AuditID: cbfec7f2-ef1ff7000001ef66-6c-5e9f2485c8e2 Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 67.3B.07950.5842F9E5; Tue, 21 Apr 2020 17:51:17 +0100 (BST) Received: from AMDC3061.digital.local (unknown [106.120.51.75]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20200421165116eusmtip188463c8be99c6ed75bb173aa0c7300bd~H49AUM8hT0891608916eusmtip1E; Tue, 21 Apr 2020 16:51:16 +0000 (GMT) From: Sylwester Nawrocki To: u-boot@lists.denx.de, mbrugger@suse.com, marex@denx.de, bmeng.cn@gmail.com Cc: agraf@suse.de, sjg@chrmium.org, jh80.chung@samsung.com, m.szyprowski@samsung.com, b.zolnierkie@samsung.com, Sylwester Nawrocki Subject: [RFC PATCH 2/9] pci: Move some PCIe register offset definitions to a common header Date: Tue, 21 Apr 2020 18:50:52 +0200 Message-Id: <20200421165059.19394-3-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200421165059.19394-1-s.nawrocki@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprCKsWRmVeSWpSXmKPExsWy7djP87qtKvPjDK5dMbM4ceUfo8XGGetZ Lab2xFvc+NXGarH2yF12izdtjYwWCyY/YbU4/Kad1aLj6n9Gi7d7O9kduDzun2pg9Zg36wSL x85Zd9k9zt7ZwejRt2UVo8f6LVdZPDafrg5gj+KySUnNySxLLdK3S+DKON7ZzlSwX6xi2at2 pgbGA0JdjJwcEgImEi/+n2brYuTiEBJYwShxZF4DO4TzhVHi1PNNjBDOZ0aJlYtWs8G0HOnt ZoZILGeU+P7vEitcy+Qtv5hBqtgEDCV6j/YxgtgiAgES135OAxvFLDCfUeLPp2lgCWGBWImT E66zgNgsAqoSP+aAjOXg4BWwlpj1sx5im7zE6g0HwGZyCthI3P0+gwVkjoTAZHaJSRPPM0EU uUg8/n0EyhaWeHV8CzuELSPxf+d8JoiGZkaJnt232SGcCYwS948vYISospa4c+4XG8hmZgFN ifW79EFMCQFHidPb5CFMPokbbwVBipmBzEnbpjNDhHklOtqg4agi8XvVdKgLpCS6n/xngbA9 JBbf+8oECZ9+RolHG2YyT2CUn4WwawEj4ypG8dTS4tz01GLDvNRyveLE3OLSvHS95PzcTYzA tHL63/FPOxi/Xko6xCjAwajEw3vj/Lw4IdbEsuLK3EOMEhzMSiK8Gx4ChXhTEiurUovy44tK c1KLDzFKc7AoifMaL3oZKySQnliSmp2aWpBaBJNl4uCUamAM1bM8nhboKbXx7a5/eqenrpBc tPL6zokpcze+/LRigtJtgRWKVoIl1RW8pb6qJ95eN1v41OnOn84lYXtf5K0TsM3e92h1v7Lt yq+rpFqvOn0IZYzqz3+7I3/fnBWKcdt7vH43TD9o9Okyc3dFx+X2AL/FXx8+WfxJ9RvTypyr 7qdPiU3yqLH7o8RSnJFoqMVcVJwIAHPQd5InAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrELMWRmVeSWpSXmKPExsVy+t/xu7qtKvPjDNa+Z7I4ceUfo8XGGetZ Lab2xFvc+NXGarH2yF12izdtjYwWCyY/YbU4/Kad1aLj6n9Gi7d7O9kduDzun2pg9Zg36wSL x85Zd9k9zt7ZwejRt2UVo8f6LVdZPDafrg5gj9KzKcovLUlVyMgvLrFVija0MNIztLTQMzKx 1DM0No+1MjJV0rezSUnNySxLLdK3S9DLON7ZzlSwX6xi2at2pgbGA0JdjJwcEgImEkd6u5lB bCGBpYwSl7fqdDFyAMWlJOa3KEGUCEv8udbF1sXIBVTyiVHi2YqjLCAJNgFDid6jfYwgtohA iMSLo1eYQIqYQeb8aXjDCjJIWCBa4uupMpAaFgFViR9zQHZxcPAKWEvM+lkPMV9eYvWGA2An cArYSNz9PoMF4hxriYZLS1gmMPItYGRYxSiSWlqcm55bbKRXnJhbXJqXrpecn7uJERje2479 3LKDsetd8CFGAQ5GJR7eG+fnxQmxJpYVV+YeYpTgYFYS4d3wECjEm5JYWZValB9fVJqTWnyI 0RToponMUqLJ+cDYyyuJNzQ1NLewNDQ3Njc2s1AS5+0QOBgjJJCeWJKanZpakFoE08fEwSnV wMi3jLGLQadphdgdbz2tW8UOS69dvPMj9d/ET4o918pV/k2+mS3v/vDrq0P8v6P+B189IDYj YqlOR/nJS1e27LKtm/pvqnhR0vU5yjvur384TfHDtiSLPwenSLRn3T+6eW/b0c39z2s58nbZ TuD7dGVfnRlzzBkv65yPq8u6k1yOf8ttZ88qPf5eiaU4I9FQi7moOBEAMpRHSYUCAAA= X-CMS-MailID: 20200421165117eucas1p220b0a5f7820c7cf7bae20dc693584ad4 X-Msg-Generator: CA X-RootMTR: 20200421165117eucas1p220b0a5f7820c7cf7bae20dc693584ad4 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20200421165117eucas1p220b0a5f7820c7cf7bae20dc693584ad4 References: <20200421165059.19394-1-s.nawrocki@samsung.com> X-Mailman-Approved-At: Tue, 21 Apr 2020 19:40:20 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean Some PCI Express register offsets are currently defined in multiple drivers, move them to a common header to avoid re-definitions and as a pre-requisite for adding new PCIe driver. Signed-off-by: Sylwester Nawrocki Reviewed-by: Bin Meng --- drivers/pci/pci-rcar-gen3.c | 8 -------- drivers/pci/pcie_intel_fpga.c | 3 --- include/pci.h | 13 +++++++++++++ 3 files changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c index 30eff67..393f1c9 100644 --- a/drivers/pci/pci-rcar-gen3.c +++ b/drivers/pci/pci-rcar-gen3.c @@ -117,14 +117,6 @@ #define RCAR_PCI_MAX_RESOURCES 4 #define MAX_NR_INBOUND_MAPS 6 -#define PCI_EXP_FLAGS 2 /* Capabilities register */ -#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */ -#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */ -#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ -#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ -#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ -#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ - enum { RCAR_PCI_ACCESS_READ, RCAR_PCI_ACCESS_WRITE, diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c index 6a9f29c..69363a0 100644 --- a/drivers/pci/pcie_intel_fpga.c +++ b/drivers/pci/pcie_intel_fpga.c @@ -65,9 +65,6 @@ #define IS_ROOT_PORT(pcie, bdf) \ ((PCI_BUS(bdf) == pcie->first_busno) ? true : false) -#define PCI_EXP_LNKSTA 18 /* Link Status */ -#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ - /** * struct intel_fpga_pcie - Intel FPGA PCIe controller state * @bus: Pointer to the PCI bus diff --git a/include/pci.h b/include/pci.h index 174ddd4..3d7646d 100644 --- a/include/pci.h +++ b/include/pci.h @@ -471,11 +471,24 @@ #define PCI_EA_FIELD_MASK 0xfffffffc /* For Base & Max Offset */ /* PCI Express capabilities */ +#define PCI_EXP_FLAGS 2 /* Capabilities register */ +#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */ +#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */ + #define PCI_EXP_DEVCAP 4 /* Device capabilities */ #define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ #define PCI_EXP_DEVCTL 8 /* Device Control */ #define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ +#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ +#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ + +#define PCI_EXP_LNKSTA 18 /* Link Status */ +#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ + +#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ +#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ + /* Include the ID list */ #include