From patchwork Wed Jan 15 14:49:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudius Heine X-Patchwork-Id: 1223590 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=dXBUxPlx; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47yVcW1VWsz9sNx for ; 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Wed, 15 Jan 2020 15:50:14 +0100 (CET) Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id mmjfuos4kgA6; Wed, 15 Jan 2020 15:50:13 +0100 (CET) X-Auth-Info: dT6W+s/6gH8FzrzgCcX6IJyyNrqUCeb4VE5vVoVZJvw= Received: from mail-internal.denx.de (p578adb1c.dip0.t-ipconnect.de [87.138.219.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Wed, 15 Jan 2020 15:50:13 +0100 (CET) Received: from pollux.denx.de (pollux [192.168.1.1]) by mail-internal.denx.de (Postfix) with ESMTP id 28A90185C71; Wed, 15 Jan 2020 15:50:09 +0100 (CET) Received: by pollux.denx.de (Postfix, from userid 569) id 094DA1A00A1; Wed, 15 Jan 2020 15:50:09 +0100 (CET) From: Claudius Heine To: Subject: [RFC PATCH] imx: imx8mm-evk/imx8mn-evk: enable sysreset driver for SPL Date: Wed, 15 Jan 2020 15:49:32 +0100 Message-Id: <20200115144938.730627-1-ch@denx.de> X-Mailer: git-send-email 2.24.1 In-Reply-To: <65d46ac8-a5f5-505c-4991-59fe4d946341@denx.de> References: <65d46ac8-a5f5-505c-4991-59fe4d946341@denx.de> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , open list , "NXP i.MX U-Boot Team" Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.101.4 at phobos.denx.de X-Virus-Status: Clean Hi, I have only tested compiling, but if the reset in the SPL on i.MX8MM and i.MX8MN still works with this patch applied, then we don't need board specific 'do_reset' function and special configurations flags for this case. I currently don't have access to the hardware to test this. regards, Claudius -- >8 -- Subject: [RFC PATCH] imx: imx8mm-evk/imx8mn-evk: enable sysreset driver for SPL Instead of implementing a custom reset function for the SPL, it can directly use the sysreset DM driver. Signed-off-by: Claudius Heine Reviewed-by: Simon Glass --- arch/arm/mach-imx/imx8m/soc.c | 19 ------------------- board/freescale/imx8mm_evk/spl.c | 9 --------- board/freescale/imx8mn_evk/spl.c | 9 --------- configs/imx8mm_evk_defconfig | 1 + configs/imx8mn_ddr4_evk_defconfig | 1 + 5 files changed, 2 insertions(+), 37 deletions(-) diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 5ce5a180e8..519108d4c9 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -378,22 +378,3 @@ int ft_system_setup(void *blob, bd_t *bd) return 0; } #endif - -#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SYSRESET) -void reset_cpu(ulong addr) -{ - struct watchdog_regs *wdog = (struct watchdog_regs *)addr; - - if (!addr) - wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; - - /* Clear WDA to trigger WDOG_B immediately */ - writew((WCR_WDE | WCR_SRS), &wdog->wcr); - - while (1) { - /* - * spin for .5 seconds before reset - */ - } -} -#endif diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c index 2d08f9a563..e8dec452ea 100644 --- a/board/freescale/imx8mm_evk/spl.c +++ b/board/freescale/imx8mm_evk/spl.c @@ -159,12 +159,3 @@ void board_init_f(ulong dummy) board_init_r(NULL, 0); } - -int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - puts ("resetting ...\n"); - - reset_cpu(WDOG1_BASE_ADDR); - - return 0; -} diff --git a/board/freescale/imx8mn_evk/spl.c b/board/freescale/imx8mn_evk/spl.c index cbde9f6b3c..0c70fbb155 100644 --- a/board/freescale/imx8mn_evk/spl.c +++ b/board/freescale/imx8mn_evk/spl.c @@ -112,12 +112,3 @@ void board_init_f(ulong dummy) board_init_r(NULL, 0); } - -int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - puts("resetting ...\n"); - - reset_cpu(WDOG1_BASE_ADDR); - - return 0; -} diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 87560ef989..c07f4104f9 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -83,5 +83,6 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_MXC_UART=y CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_DM_THERMAL=y diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index 50b03d0763..c55998da4c 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -75,5 +75,6 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_MXC_UART=y CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_DM_THERMAL=y