From patchwork Wed Nov 20 21:27:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Goldschmidt X-Patchwork-Id: 1198534 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="s+IEDmeZ"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 47JG4l5TNFz9sPL for ; Thu, 21 Nov 2019 08:27:51 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 1F8CDC21E26; Wed, 20 Nov 2019 21:27:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 294EFC21C2C; Wed, 20 Nov 2019 21:27:44 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 92774C21C2C; Wed, 20 Nov 2019 21:27:42 +0000 (UTC) Received: from mail-wm1-f65.google.com (mail-wm1-f65.google.com [209.85.128.65]) by lists.denx.de (Postfix) with ESMTPS id 44539C21C29 for ; Wed, 20 Nov 2019 21:27:42 +0000 (UTC) Received: by mail-wm1-f65.google.com with SMTP id z19so1324776wmk.3 for ; Wed, 20 Nov 2019 13:27:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=jlME5vBQi74EoYxHody+6aNNC34qMKmSH10eSo3g+PI=; b=s+IEDmeZqULwtD1zApDeTJIsRc1kvITCzue0qgmURCtF9s3+InWEMotxITpAV2aMzQ gogQ9DZLcbtw6Yxu7nAwY+TvsGF2w29iYCX2MVrxALtEHwgE+nYI5eXwbd8KoQ4dP96e gUIygYqnkZcoyBZRnKSMHQiCoYZQTQSCV3eLaTBunTd7Gz8l4YjtcUFG0u67/i2vAlmM BhiNm/FMQoADCk2uPrtNtsl+gZQUlAsPyUT9/Y1XFiX76JjQI4nbe5eBAn3SZKBR5qlQ ourijavU+S0bis5t4E+TjscJO/v9e8UhzC1P65gwSdnbirLBEmj/N0ZoteDujxdjXr3s Z2EA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=jlME5vBQi74EoYxHody+6aNNC34qMKmSH10eSo3g+PI=; b=lOgfxDMDgE5SceCl5HdpuGzRttiUoXZHyjkDYQAQYYaWjmGhrxH58D8oKV3sHqatSv aaq3cFanOIQ5tm228OPoTVxJqDDAicQR4M7UoNnHsngijY+/3XVvoMX0ncLsNnd0KH91 g/p0ELrgVZyHQuxtn0Pw5p0WEar4iZz91F9yHmh2kAOS6meZxsHCx3OFAkPQLI02GGyv Gj9wNteLldYr5dpyQ5V4pizmzzH8vRthkWvjPgv9zbFuwWtBfXl8XGGx+bWwQ9umByqL GGjXaOomJG6F1oSx/nYEbl9kYW82TDlZWiinQDqHX5yl5/7IrbIMA/AegCycZ7Tr/cMP ef9w== X-Gm-Message-State: APjAAAWyDmp5aZM9ZigxcvGCtEEN0crUKKXGP34w7C0Hy7rrnVuoNqa5 CHf3UIost8ob/YfflPHwLVo= X-Google-Smtp-Source: APXvYqy2pIxw5Ka8tb1fVcqywK0Y5oMXxWAHVkSuBLk57pBdW2bhkLL16ZqbRY09wqzpe5fMh7cnrw== X-Received: by 2002:a7b:c445:: with SMTP id l5mr5843679wmi.140.1574285261863; Wed, 20 Nov 2019 13:27:41 -0800 (PST) Received: from ubuntu.home ([2a02:8071:6a3:700:d43f:27ce:888:835]) by smtp.gmail.com with ESMTPSA id 65sm719163wrs.9.2019.11.20.13.27.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Nov 2019 13:27:40 -0800 (PST) From: Simon Goldschmidt To: Marek Vasut Date: Wed, 20 Nov 2019 22:27:31 +0100 Message-Id: <20191120212731.24180-1-simon.k.r.goldschmidt@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [RESEND PATCH v3] spi: cadence_qspi: support DM_CLK X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Support loading clk speed via DM instead of requiring ad-hoc code. Signed-off-by: Simon Goldschmidt --- Changes in v3: - load ref_clk_hz only once in cadence_spi_ofdata_to_platdata instead of loading it every time in cadence_spi_write_speed Changes in v2: - check return value of clk_get_rate for error drivers/spi/cadence_qspi.c | 21 +++++++++++++++++++-- drivers/spi/cadence_qspi.h | 1 + 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index e2e54cd277..8fd23a7702 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -24,10 +25,10 @@ static int cadence_spi_write_speed(struct udevice *bus, uint hz) struct cadence_spi_priv *priv = dev_get_priv(bus); cadence_qspi_apb_config_baudrate_div(priv->regbase, - CONFIG_CQSPI_REF_CLK, hz); + plat->ref_clk_hz, hz); /* Reconfigure delay timing if speed is changed. */ - cadence_qspi_apb_delay(priv->regbase, CONFIG_CQSPI_REF_CLK, hz, + cadence_qspi_apb_delay(priv->regbase, plat->ref_clk_hz, hz, plat->tshsl_ns, plat->tsd2d_ns, plat->tchsh_ns, plat->tslch_ns); @@ -294,6 +295,8 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) { struct cadence_spi_platdata *plat = bus->platdata; ofnode subnode; + struct clk clk; + int ret; plat->regbase = (void *)devfdt_get_addr_index(bus, 0); plat->ahbbase = (void *)devfdt_get_addr_index(bus, 1); @@ -325,6 +328,20 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) plat->tchsh_ns = ofnode_read_u32_default(subnode, "cdns,tchsh-ns", 20); plat->tslch_ns = ofnode_read_u32_default(subnode, "cdns,tslch-ns", 20); + ret = clk_get_by_index(bus, 0, &clk); + if (ret) { +#ifdef CONFIG_CQSPI_REF_CLK + plat->ref_clk_hz = CONFIG_CQSPI_REF_CLK; +#else + return ret; +#endif + } else { + plat->ref_clk_hz = clk_get_rate(&clk); + clk_free(&clk); + if (IS_ERR_VALUE(plat->ref_clk_hz)) + return plat->ref_clk_hz; + } + debug("%s: regbase=%p ahbbase=%p max-frequency=%d page-size=%d\n", __func__, plat->regbase, plat->ahbbase, plat->max_hz, plat->page_size); diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h index 20cceca239..99dee75bbd 100644 --- a/drivers/spi/cadence_qspi.h +++ b/drivers/spi/cadence_qspi.h @@ -16,6 +16,7 @@ #define CQSPI_READ_CAPTURE_MAX_DELAY 16 struct cadence_spi_platdata { + unsigned int ref_clk_hz; unsigned int max_hz; void *regbase; void *ahbbase;