From patchwork Tue Nov 19 15:01:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthias Brugger X-Patchwork-Id: 1197502 X-Patchwork-Delegate: matthias.bgg@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="yBIl8K5y"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 47HTZd2pY8z9sPf for ; Wed, 20 Nov 2019 02:02:33 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 17637C21FD5; Tue, 19 Nov 2019 15:02:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 304E2C21FCF; Tue, 19 Nov 2019 15:02:10 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 774F1C21FB3; Tue, 19 Nov 2019 15:01:22 +0000 (UTC) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by lists.denx.de (Postfix) with ESMTPS id 6AE29C21F2B for ; Tue, 19 Nov 2019 15:01:19 +0000 (UTC) Received: from ziggy.de (unknown [37.223.145.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id ED3DA2235D; Tue, 19 Nov 2019 15:01:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1574175678; bh=aNj/GZT1uKzK0Ejrc2MBMSU/XlP126AlTx+nDyEGw/Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=yBIl8K5yrpZ3oKEPQNQ1NCKh+zrvWpGxy9WXX6ekPvurBqjoKUsRzeL+tmHBbGPbl Va2e9xtZjNa1PpMlnoLQdA5tNvCLUT5saWnJl6NTVIVh5TwnqElmcPQeAbaiN9gc8s 0Tfc5xo0iw1Q3Aj6rs7gX7Q37/6KP3yrwY1yZvY8= From: matthias.bgg@kernel.org To: u-boot@lists.denx.de, Alexander Graf , fvogt@suse.com, matthias.bgg@kernel.org Date: Tue, 19 Nov 2019 16:01:05 +0100 Message-Id: <20191119150105.6515-5-matthias.bgg@kernel.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191119150105.6515-1-matthias.bgg@kernel.org> References: <20191119150105.6515-1-matthias.bgg@kernel.org> MIME-Version: 1.0 Cc: Matthias Brugger Subject: [U-Boot] [PATCH v4 4/4] ARM: bcm283x: Set memory map at run-time X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Matthias Brugger For bcm283x based on arm64 we also have to change the mm_region. Add assign this in mach_cpu_init() so we can create now one binary for RPi3 and RPi4. Signed-off-by: Matthias Brugger --- Changes in v4: - call rpi_update_mem_map only for ARM64 - get rid of struct pdata Changes in v3: None Changes in v2: - Move mem_map out of assembly file - push mem_map into the .data section - update the members of mem_map instead of the pointer arch/arm/mach-bcm283x/init.c | 92 ++++++++++++++++++++++++++++++++++++ board/raspberrypi/rpi/rpi.c | 45 ------------------ 2 files changed, 92 insertions(+), 45 deletions(-) diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c index b3f3dfabea..6fb41a99b2 100644 --- a/arch/arm/mach-bcm283x/init.c +++ b/arch/arm/mach-bcm283x/init.c @@ -10,6 +10,96 @@ #include #include +#ifdef CONFIG_ARM64 +#include + +static struct mm_region bcm283x_mem_map[] = { + { + .virt = 0x00000000UL, + .phys = 0x00000000UL, + .size = 0x3f000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .virt = 0x3f000000UL, + .phys = 0x3f000000UL, + .size = 0x01000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* List terminator */ + 0, + } +}; + +static struct mm_region bcm2711_mem_map[] = { + { + .virt = 0x00000000UL, + .phys = 0x00000000UL, + .size = 0xfe000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .virt = 0xfe000000UL, + .phys = 0xfe000000UL, + .size = 0x01800000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = bcm283x_mem_map; + +/* + * I/O address space varies on different chip versions. + * We set the base address by inspecting the DTB. + */ +static const struct udevice_id board_ids[] = { + { .compatible = "brcm,bcm2837", .data = (ulong)&bcm283x_mem_map}, + { .compatible = "brcm,bcm2838", .data = (ulong)&bcm2711_mem_map}, + { .compatible = "brcm,bcm2711", .data = (ulong)&bcm2711_mem_map}, + { }, +}; + +static void _rpi_update_mem_map(struct mm_region *pd) +{ + int i; + + for (i = 0; i < 2; i++) { + mem_map[i].virt = pd[i].virt; + mem_map[i].phys = pd[i].phys; + mem_map[i].size = pd[i].size; + mem_map[i].attrs = pd[i].attrs; + } +} + +static void rpi_update_mem_map(void) +{ + int ret; + struct mm_region *mm; + const struct udevice_id *of_match = board_ids; + + while (of_match->compatible) { + ret = fdt_node_check_compatible(gd->fdt_blob, 0, + of_match->compatible); + if (!ret) { + mm = (struct mm_region *)of_match->data; + _rpi_update_mem_map(mm); + break; + } + + of_match++; + } +} +#else +static void rpi_update_mem_map(void) {} +#endif + unsigned long rpi_bcm283x_base = 0x3f000000; int arch_cpu_init(void) @@ -24,6 +114,8 @@ int mach_cpu_init(void) int ret, soc_offset; u64 io_base, size; + rpi_update_mem_map(); + /* Get IO base from device tree */ soc_offset = fdt_path_offset(gd->fdt_blob, "/soc"); if (soc_offset < 0) diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index e84a1db14a..3d4afaf653 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -251,51 +251,6 @@ static uint32_t rev_scheme; static uint32_t rev_type; static const struct rpi_model *model; -#ifdef CONFIG_ARM64 -#ifndef CONFIG_BCM2711 -static struct mm_region bcm283x_mem_map[] = { - { - .virt = 0x00000000UL, - .phys = 0x00000000UL, - .size = 0x3f000000UL, - .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | - PTE_BLOCK_INNER_SHARE - }, { - .virt = 0x3f000000UL, - .phys = 0x3f000000UL, - .size = 0x01000000UL, - .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | - PTE_BLOCK_NON_SHARE | - PTE_BLOCK_PXN | PTE_BLOCK_UXN - }, { - /* List terminator */ - 0, - } -}; -#else -static struct mm_region bcm283x_mem_map[] = { - { - .virt = 0x00000000UL, - .phys = 0x00000000UL, - .size = 0xfe000000UL, - .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | - PTE_BLOCK_INNER_SHARE - }, { - .virt = 0xfe000000UL, - .phys = 0xfe000000UL, - .size = 0x01800000UL, - .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | - PTE_BLOCK_NON_SHARE | - PTE_BLOCK_PXN | PTE_BLOCK_UXN - }, { - /* List terminator */ - 0, - } -}; -#endif -struct mm_region *mem_map = bcm283x_mem_map; -#endif - int dram_init(void) { ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_arm_mem, msg, 1);