From patchwork Mon Nov 18 21:04:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 1196968 X-Patchwork-Delegate: joe.hershberger@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="KNPnGTVY"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 47H1v94T7bz9sP4 for ; Tue, 19 Nov 2019 08:15:17 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 595E5C21E2F; Mon, 18 Nov 2019 21:15:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 65C39C21E07; Mon, 18 Nov 2019 21:05:16 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id C8AA2C21E90; Mon, 18 Nov 2019 21:05:13 +0000 (UTC) Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lists.denx.de (Postfix) with ESMTPS id A5453C21EBB for ; Mon, 18 Nov 2019 21:05:09 +0000 (UTC) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id xAIL56bw053335; Mon, 18 Nov 2019 15:05:06 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1574111106; bh=Hjr7Ii6Ho8rTU2mfnZAWVYihCVxLoNoiBdwS0Eink9k=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=KNPnGTVYn8DmS+X1PK+EaChrOzueHVo9pZllCffs71NkMdvaSK+jhjyV7ZbIhEm32 R53iQs43QSTMn1OLcRXTaZaJeuOXQjtjoy62oL8N98I4/jsDobVLam/Dziqlwd6Zsh 2TpFSjKmojeIA9dkzZcLZbhp9OYxNoSsOxpXWsmc= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xAIL56Ua089856 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 18 Nov 2019 15:05:06 -0600 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Mon, 18 Nov 2019 15:05:06 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Mon, 18 Nov 2019 15:05:06 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id xAIL555W027375; Mon, 18 Nov 2019 15:05:05 -0600 From: Grygorii Strashko To: Joe Hershberger Date: Mon, 18 Nov 2019 23:04:42 +0200 Message-ID: <20191118210447.7433-4-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191118210447.7433-1-grygorii.strashko@ti.com> References: <20191118210447.7433-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: Tom Rini , Michal Simek , u-boot@lists.denx.de, Trent Piepho Subject: [U-Boot] [PATCH 3/8] dt-bindings: phy: dp83867: Add documentation for disabling clock output X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Based on commit 980066e6d964 ("dt-bindings: phy: dp83867: Add documentation for disabling clock output") of mainline linux kernel. The clock output is generally only used for testing and development and not used to daisy-chain PHYs. It's just a source of RF noise afterward. Add a mux value for "off". I've added it as another enumeration to the output property. In the actual PHY, the mux and the output enable are independently controllable. However, it doesn't seem useful to be able to describe the mux setting when the output is disabled. Document that PHY's default setting will be left as is if the property is omitted. Signed-off-by: Grygorii Strashko Acked-by: Joe Hershberger --- doc/device-tree-bindings/net/ti,dp83867.txt | 6 ++++-- include/dt-bindings/net/ti-dp83867.h | 3 ++- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/doc/device-tree-bindings/net/ti,dp83867.txt b/doc/device-tree-bindings/net/ti,dp83867.txt index 034146f5f8..268220964a 100644 --- a/doc/device-tree-bindings/net/ti,dp83867.txt +++ b/doc/device-tree-bindings/net/ti,dp83867.txt @@ -12,8 +12,10 @@ Required properties: compensate for the board being designed with the lanes swapped. - enet-phy-no-lane-swap - Indicates that PHY will disable swap of the TX/RX lanes. - - ti,clk-output-sel - Clock output select - see dt-bindings/net/ti-dp83867.h - for applicable values + - ti,clk-output-sel - Muxing option for CLK_OUT pin. See dt-bindings/net/ti-dp83867.h + for applicable values. The CLK_OUT pin can also + be disabled by this property. When omitted, the + PHY's default will be left as is. Default child nodes are standard Ethernet PHY device nodes as described in doc/devicetree/bindings/net/ethernet.txt diff --git a/include/dt-bindings/net/ti-dp83867.h b/include/dt-bindings/net/ti-dp83867.h index 85d08f6974..cde5aa7e27 100644 --- a/include/dt-bindings/net/ti-dp83867.h +++ b/include/dt-bindings/net/ti-dp83867.h @@ -45,5 +45,6 @@ #define DP83867_CLK_O_SEL_CHN_C_TCLK 0xA #define DP83867_CLK_O_SEL_CHN_D_TCLK 0xB #define DP83867_CLK_O_SEL_REF_CLK 0xC - +/* Special flag to indicate clock should be off */ +#define DP83867_CLK_O_SEL_OFF 0xFFFFFFFF #endif