From patchwork Tue Oct 29 21:08:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suneel Garapati X-Patchwork-Id: 1186313 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="e45o9l44"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 472kxS2QtVz9sCJ for ; Wed, 30 Oct 2019 08:19:40 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id F0E92C21DF3; Tue, 29 Oct 2019 21:19:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 813CBC21DFA; Tue, 29 Oct 2019 21:15:03 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id AE14CC21E12; Tue, 29 Oct 2019 21:09:07 +0000 (UTC) Received: from mail-pl1-f196.google.com (mail-pl1-f196.google.com [209.85.214.196]) by lists.denx.de (Postfix) with ESMTPS id 7107FC21E4E for ; Tue, 29 Oct 2019 21:09:03 +0000 (UTC) Received: by mail-pl1-f196.google.com with SMTP id q16so8047401pll.11 for ; Tue, 29 Oct 2019 14:09:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3MakGTevPyeRl3vYT9pMvfFz09ZYfSBpW0jRm08Xis0=; b=e45o9l44KLdJqdMszRVwXlcSaRXi2YiAt3Y69o3eNgzxcEOcZXTQ/NIvdIraB0dgZv WNj1BoUSYBOrVHLpsFUG1y/9g5A3Lf1daWQKYpSxdnebLBCBcAOwMzA3wGxRS437/HAl 3cwKQ2yU5hjoN2daW2ifjsdhM/5ENhNiYo7fAmpfh0dhIUjiApbcGU/8DdCrsmLXOqhz MVNItTfN6trGBVZbe5Dk7SkhAvtCUT/TC+/78uM/MiI3ztpdlg0LCVnKvGRQNacm0+Hd FNi2Jyz9er6H5p60w8FnziFP32qhSSZpVCXzpSorAsGuEnvEtQyVt4QkcwmfvEDrNnjr RW1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3MakGTevPyeRl3vYT9pMvfFz09ZYfSBpW0jRm08Xis0=; b=NtXEOCuUv1VnNeNUmc+AmPJYGd+E/Nri0ZmOAu84LIYOT5SiPZ5hQavo7hpKpbKz9p vHjxNX4fZMKqoIVxEne6s9y19v16jdFAzYW3bUmX0OIayQzSz2e6Nl9vGexlZHnCsNVn cUBANNdOgu21pwY6lySf8opcECliDyi0jXhH6w7EeofA3LNq9SEJJXYB2/g3e6IWJmbB MVB6UvmAARPUWyrXjVs0eXi1rpgdRnTM1j/Copu7KlFn/JaZ9F7k94ySS4Rx42n4RY5X dPdb2pH81+jnnpkUnMCT8Ktw6dfGxifXpdxuetXdwyb9ikv7XIkEJ0mLA3FLzBkhiFub 15CQ== X-Gm-Message-State: APjAAAU06T3cB9aZGhPa9pkoLGgUGhD3VOrJ6h93spAmdwfZIS+Kp/lB soeUCumfU2nQiybjEzVHeDfekUEI X-Google-Smtp-Source: APXvYqxHr64gdO00LcEI0SSf0+SgGTfAx4tITH522kws0jeo5Y8pDBZIyZZAwzS/ZTRMFOUTLwEZMw== X-Received: by 2002:a17:902:6acb:: with SMTP id i11mr683676plt.273.1572383341781; Tue, 29 Oct 2019 14:09:01 -0700 (PDT) Received: from suneel.hsd1.ca.comcast.net ([2601:641:4000:c9c0:7044:5eef:7096:2413]) by smtp.gmail.com with ESMTPSA id q3sm131160pgj.54.2019.10.29.14.09.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 14:09:01 -0700 (PDT) From: Suneel Garapati To: u-boot Date: Tue, 29 Oct 2019 14:08:19 -0700 Message-Id: <20191029210821.1954-28-suneelglinux@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191029210821.1954-1-suneelglinux@gmail.com> References: <20191029210821.1954-1-suneelglinux@gmail.com> MIME-Version: 1.0 Cc: Tom Rini , Matthias Brugger , Joe Hershberger , Prasun Kapoor , Maen Suleiman , Chandrakala Chavva , Zi Shen Lim , Stefan Roese , Chris Packham Subject: [U-Boot] [RFC PATCH 27/29] drivers: watchdog: add reset support for OcteonTX X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Suneel Garapati Adds support for Core 0 poke on OcteonTX and OcteonTX2 platforms. Signed-off-by: Suneel Garapati --- drivers/watchdog/Kconfig | 10 +++++ drivers/watchdog/Makefile | 1 + drivers/watchdog/octeontx_wdt.c | 76 +++++++++++++++++++++++++++++++++ 3 files changed, 87 insertions(+) create mode 100644 drivers/watchdog/octeontx_wdt.c diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 8c16d69d33..61357a7f0a 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -121,6 +121,16 @@ config WDT_MTK The watchdog timer is stopped when initialized. It performs full SoC reset. +config WDT_OCTEONTX + bool "OcteonTX core watchdog support" + depends on WDT && (ARCH_OCTEONTX || ARCH_OCTEONTX2) + default y if WDT && ARCH_OCTEONTX || ARCH_OCTEONTX2 + imply WATCHDOG + help + This enables OcteonTX watchdog driver, which can be + found on OcteonTX/TX2 chipsets and inline with driver model. + Only supports watchdog reset. + config WDT_OMAP3 bool "TI OMAP watchdog timer support" depends on WDT && ARCH_OMAP2PLUS diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 955caef815..66b20b0e98 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o obj-$(CONFIG_WDT_MTK) += mtk_wdt.o +obj-$(CONFIG_WDT_OCTEONTX) += octeontx_wdt.o obj-$(CONFIG_WDT_OMAP3) += omap_wdt.o obj-$(CONFIG_WDT_SP805) += sp805_wdt.o obj-$(CONFIG_WDT_STM32MP) += stm32mp_wdt.o diff --git a/drivers/watchdog/octeontx_wdt.c b/drivers/watchdog/octeontx_wdt.c new file mode 100644 index 0000000000..9362ad99bf --- /dev/null +++ b/drivers/watchdog/octeontx_wdt.c @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Marvell International Ltd. + * + * https://spdx.org/licenses + */ + +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define CORE0_POKE_OFFSET 0x50000 + +#if CONFIG_IS_ENABLED(ARCH_OCTEONTX) +#define REG_BASE 0x844000000000 +#elif CONFIG_IS_ENABLED(ARCH_OCTEONTX2) +#define REG_BASE 0x802000000000 +#endif + +struct octeontx_wdt { + void __iomem *reg; +}; + +static struct udevice *wdt_dev; + +static int octeontx_wdt_reset(struct udevice *dev) +{ + struct octeontx_wdt *priv; + u64 poke_reg; + + if (dev) { + priv = dev_get_priv(dev); + poke_reg = ((u64)priv->reg & ~0xfffffULL) | CORE0_POKE_OFFSET; + } else { + poke_reg = REG_BASE + CORE0_POKE_OFFSET; + } + writeq(~0ULL, poke_reg); + + return 0; +} + +static int octeontx_wdt_probe(struct udevice *dev) +{ + struct octeontx_wdt *priv = dev_get_priv(dev); + fdt_addr_t addr; + + addr = dev_read_addr_index(dev, 0); + if (addr == FDT_ADDR_T_NONE) + return -ENODEV; + + priv->reg = (void __iomem *)addr; + wdt_dev = dev; + + return 0; +} + +static const struct wdt_ops octeontx_wdt_ops = { + .reset = octeontx_wdt_reset, +}; + +static const struct udevice_id octeontx_wdt_ids[] = { + { .compatible = "arm,sbsa-gwdt" }, + {} +}; + +U_BOOT_DRIVER(wdt_octeontx) = { + .name = "wdt_octeontx", + .id = UCLASS_WDT, + .of_match = octeontx_wdt_ids, + .ops = &octeontx_wdt_ops, + .priv_auto_alloc_size = sizeof(struct octeontx_wdt), + .probe = octeontx_wdt_probe, +};