From patchwork Tue Oct 15 20:10:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Goldschmidt X-Patchwork-Id: 1177379 X-Patchwork-Delegate: simon.k.r.goldschmidt@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="W0xorbfq"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46t6Fb5Bggz9sPF for ; Wed, 16 Oct 2019 07:18:43 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 74D01C21E08; Tue, 15 Oct 2019 20:13:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 378C6C21E12; Tue, 15 Oct 2019 20:11:54 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 7065CC21BE5; Tue, 15 Oct 2019 20:11:01 +0000 (UTC) Received: from mail-wm1-f68.google.com (mail-wm1-f68.google.com [209.85.128.68]) by lists.denx.de (Postfix) with ESMTPS id B509CC21DAF for ; Tue, 15 Oct 2019 20:10:59 +0000 (UTC) Received: by mail-wm1-f68.google.com with SMTP id v17so358191wml.4 for ; Tue, 15 Oct 2019 13:10:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sPqbgMeUFVaphT4TOJ/Oek+wGGIhVSDYH4OH/5nMV2s=; b=W0xorbfq6S2a0hHgKOf6KDFCiu0paiMZPSFCGME7H2GAtnbNJ2YX0dLQGlrEalfbXm ZDHiOo1C1Vj7k/5vl5B00KImzDbFQD79l/CTp9psIAF98a/crl2B7DdG8eOfhh2cSfVm V726EW0xy2sxnTN9E1AgU3KTHOu7fXVGcj0R8KE2dfdK+6rbkO5lH0+dmVqUVLmtp8e8 tyAEmJJPjbWlNqmJPNjtrE7DRaH/vMcJ1Hnjguei+4rTeWVoD3eodhMkcBit/dqMr7jz aspoAaUgXgwrFcjx3UwttDDoeilFV2+HqECozzgELadHeaBMs0Lyq/rzJYUg6wpYCI0W ObTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sPqbgMeUFVaphT4TOJ/Oek+wGGIhVSDYH4OH/5nMV2s=; b=ilQvsSo1Z4U11/k44RNUati1G+BGMwQ64N8IQ4ayzzGdS1A7UVJErdr0oWzGu8jzMa 57f0spNQIucQJw2OSoyzSAIsOEys5S1svp5BaSoE81r3zx72q1fWZqQzL5z2yeGiJL53 v2EJu+uVdgZs20ntP5F5n/z188S2PMGTCuogHhiSeLRYQkvR3Nl1uNkHyA0MGa4i3kmk LQ0BzgdS36E2biz80XC1rEuQQCQnPd2FDMkiT2Sq1D8DgzrXvh9elWpXh7EDwizh/MlU YXDwU4sftCiaZ69ueQtJzPeJURRICX6uTrgrHwC4YQAvth222zN7OW5QXZTJJu65OT50 7QTA== X-Gm-Message-State: APjAAAWMUQCUxTG2O+McpQ4GaUad+18dFEdk5U/P0EIZyG55oV2drqBu BuJXRMOmTQ/5zv9nPtjoNgY= X-Google-Smtp-Source: APXvYqwMqFXk7EHVVN4Yc1/+RzrUijbT7dKhYEZB2w1Tnf1HZ7SxB5S/hEnCCXyP8Q+B0gSMvMoqfw== X-Received: by 2002:a1c:4456:: with SMTP id r83mr265889wma.44.1571170259397; Tue, 15 Oct 2019 13:10:59 -0700 (PDT) Received: from ubuntu.home ([2a02:8071:6a3:700:9d84:c831:fe55:4622]) by smtp.gmail.com with ESMTPSA id 79sm329194wmb.7.2019.10.15.13.10.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Oct 2019 13:10:58 -0700 (PDT) From: Simon Goldschmidt To: Dalon L Westergreen Date: Tue, 15 Oct 2019 22:10:28 +0200 Message-Id: <20191015201032.20156-16-simon.k.r.goldschmidt@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191015201032.20156-1-simon.k.r.goldschmidt@gmail.com> References: <20191015201032.20156-1-simon.k.r.goldschmidt@gmail.com> MIME-Version: 1.0 Cc: Marek Vasut , Albert Aribaud , u-boot@lists.denx.de, Tom Rini Subject: [U-Boot] [RFC PATCH v2 15/18] arm: socfpga: gen5: load CLK config from devicetree X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Instead of using ad-hoc code in arch/arm, load clock config from devicetree. Signed-off-by: Simon Goldschmidt --- Changes in v2: None drivers/clk/altera/clk-gen5.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/clk/altera/clk-gen5.c b/drivers/clk/altera/clk-gen5.c index e8f435a798..a5425b7424 100644 --- a/drivers/clk/altera/clk-gen5.c +++ b/drivers/clk/altera/clk-gen5.c @@ -136,7 +136,13 @@ static int socfpga_gen5_clk_init(struct udevice *dev) struct socfpga_gen5_clk_platdata *plat = dev_get_platdata(dev); const struct socfpga_clock_manager *clock_manager_base = (const struct socfpga_clock_manager *)plat->regs; - const struct cm_config *cfg = cm_get_default_config(); + const struct cm_config *cfg = (const struct cm_config *) + dev_read_u8_array_ptr(dev, "altr,clk-mgr-cfg", sizeof(*cfg)); + + if (!cfg) { + dev_dbg(dev, "Failed to load CLK config\n"); + return -EINVAL; + } /* Start by being paranoid and gate all sw managed clocks */