diff mbox series

[U-Boot,v3,4/9] imx: tpc70: cosmetic: Replace magic numbers when setting ENET clock

Message ID 20191010141130.29568-5-lukma@denx.de
State Accepted
Commit eff76b10faba9f2896ac499457508d607a661f50
Delegated to: Stefano Babic
Headers show
Series dm: Convert TPC70 to use DM and DTS in SPL and u-boot proper | expand

Commit Message

Lukasz Majewski Oct. 10, 2019, 2:11 p.m. UTC
This is a cosmetic change, just to use proper define instead
of magic numbers.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
---

Changes in v3: None

 board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Stefano Babic Oct. 14, 2019, 12:40 p.m. UTC | #1
> This is a cosmetic change, just to use proper define instead
> of magic numbers.
> Signed-off-by: Lukasz Majewski <lukma@denx.de>

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic
diff mbox series

Patch

diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
index 2c541ace02..144d2c58c4 100644
--- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
+++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
@@ -119,7 +119,8 @@  static int setup_fec_clock(void)
 	struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
 
 	/* set gpr1[21] to select anatop clock */
-	clrsetbits_le32(&iomuxc_regs->gpr[1], 0x1 << 21, 0x1 << 21);
+	clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK,
+			IOMUXC_GPR1_ENET_CLK_SEL_MASK);
 
 	return enable_fec_anatop_clock(0, ENET_50MHZ);
 }