From patchwork Fri Sep 27 09:00:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthias Brugger X-Patchwork-Id: 1168353 X-Patchwork-Delegate: matthias.bgg@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="FL1Y/fQY"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46fm4k0GRsz9sPK for ; Fri, 27 Sep 2019 19:01:42 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id B5602C21EC3; Fri, 27 Sep 2019 09:01:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 85576C21E88; Fri, 27 Sep 2019 09:01:02 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 76632C21EA1; Fri, 27 Sep 2019 09:00:52 +0000 (UTC) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by lists.denx.de (Postfix) with ESMTPS id 8EDADC21E1D for ; Fri, 27 Sep 2019 09:00:49 +0000 (UTC) Received: from localhost.localdomain (unknown [65.39.69.237]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B240721848; Fri, 27 Sep 2019 09:00:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569574848; bh=K98J1nY/FPSTgnPZ3z2g2tW2hdhtyruSIT+yC4DB0gQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FL1Y/fQY4kQ/nTzsU5U9n/fCo5z+cDlhQA0ATUY6YPHlfUZqrGJn7whwZgffsGoVN Dbk+ES2fZZdS8aQketpx+Tk8kzSPOduKwmKoavvyeFkSH+QIc3IFaHbOV4P7U9AuXV 6RMWPVc0pLcC6rBUyQadQTfh6LsHEciri/zEMAFw= From: matthias.bgg@kernel.org To: u-boot@lists.denx.de, Alexander Graf , fvogt@suse.com, matthias.bgg@kernel.org Date: Fri, 27 Sep 2019 11:00:31 +0200 Message-Id: <20190927090032.13953-3-matthias.bgg@kernel.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190927090032.13953-1-matthias.bgg@kernel.org> References: <20190927090032.13953-1-matthias.bgg@kernel.org> MIME-Version: 1.0 Cc: Matthias Brugger Subject: [U-Boot] [PATCH 2/3] ARM: bcm283x: Set rpi_bcm283x_base at run-time X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Matthias Brugger As part of the effort to create one binary for several bcm83x SoCs we use the SoC compatible to decide which IO base address we use. Signed-off-by: Matthias Brugger --- arch/arm/mach-bcm283x/Kconfig | 6 ---- arch/arm/mach-bcm283x/init.c | 60 ++++++++++++++++++++++++++++++++++- 2 files changed, 59 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig index b08275f598..e8e0ff0eb4 100644 --- a/arch/arm/mach-bcm283x/Kconfig +++ b/arch/arm/mach-bcm283x/Kconfig @@ -202,10 +202,4 @@ config SYS_SOC config SYS_CONFIG_NAME default "rpi" -config BCM283x_BASE - hex - default "0x20000000" if BCM2835 - default "0x3f000000" if BCM2836 || BCM2837 - default "0xfe000000" if BCM2711 - endmenu diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c index 9dcc96ba2e..214e1078eb 100644 --- a/arch/arm/mach-bcm283x/init.c +++ b/arch/arm/mach-bcm283x/init.c @@ -7,9 +7,49 @@ */ #include +#include + +#define PDATA_BCM2835 0 +#define PDATA_BCM2836 1 +#define PDATA_BCM2837 2 +#define PDATA_BCM2838 3 extern unsigned long rpi_bcm283x_base; +struct bcm283x_pdata { + unsigned long io_base; +}; + +struct bcm283x_pdata pdata_bcm283x[] = { + [PDATA_BCM2835] = { + .io_base = 0x20000000, + }, + [PDATA_BCM2836] = { + .io_base = 0x3f000000, + }, +#ifdef CONFIG_ARM64 + [PDATA_BCM2837] = { + .io_base = 0x3f000000, + }, + [PDATA_BCM2838] = { + .io_base = 0xfe000000, + }, +#endif +}; + +/* + * I/O address space varies on different chip versions. + * We set the base address by inspecting the DTB. + */ +static const struct udevice_id board_ids[] = { + { .compatible = "brcm,bcm2835", .data = PDATA_BCM2835}, + { .compatible = "brcm,bcm2836", .data = PDATA_BCM2836}, + { .compatible = "brcm,bcm2837", .data = PDATA_BCM2837}, + { .compatible = "brcm,bcm2838", .data = PDATA_BCM2838}, + { .compatible = "brcm,bcm2711", .data = PDATA_BCM2838}, + { }, +}; + int arch_cpu_init(void) { icache_enable(); @@ -19,10 +59,28 @@ int arch_cpu_init(void) int mach_cpu_init(void) { - rpi_bcm283x_base = CONFIG_BCM283x_BASE; + const struct udevice_id *of_match = board_ids; + int ret; + + rpi_bcm283x_base = 0; + + while (of_match->compatible) { + struct bcm283x_pdata pdat; + + ret = fdt_node_check_compatible(gd->fdt_blob, 0, + of_match->compatible); + if (!ret) { + pdat = pdata_bcm283x[of_match->data]; + rpi_bcm283x_base = pdat.io_base; + break; + } + + of_match++; + } return 0; } + #ifdef CONFIG_ARMV7_LPAE void enable_caches(void) {