diff mbox series

[U-Boot,2/3] ARM: bcm283x: Set rpi_bcm283x_base at run-time

Message ID 20190927090032.13953-3-matthias.bgg@kernel.org
State Changes Requested
Delegated to: Matthias Brugger
Headers show
Series RPi one binary for RPi3/4 and RPi1/2 | expand

Commit Message

Matthias Brugger Sept. 27, 2019, 9 a.m. UTC 
From: Matthias Brugger <mbrugger@suse.com>

As part of the effort to create one binary for several bcm83x SoCs
we use the SoC compatible to decide which IO base address we use.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
---

 arch/arm/mach-bcm283x/Kconfig |  6 ----
 arch/arm/mach-bcm283x/init.c  | 60 ++++++++++++++++++++++++++++++++++-
 2 files changed, 59 insertions(+), 7 deletions(-)

Comments

Alexander Graf Sept. 27, 2019, 10:12 a.m. UTC | #1 
On 27.09.19 11:00, matthias.bgg@kernel.org wrote:
> From: Matthias Brugger <mbrugger@suse.com>
>
> As part of the effort to create one binary for several bcm83x SoCs
> we use the SoC compatible to decide which IO base address we use.
>
> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
> ---
>
>   arch/arm/mach-bcm283x/Kconfig |  6 ----
>   arch/arm/mach-bcm283x/init.c  | 60 ++++++++++++++++++++++++++++++++++-
>   2 files changed, 59 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig
> index b08275f598..e8e0ff0eb4 100644
> --- a/arch/arm/mach-bcm283x/Kconfig
> +++ b/arch/arm/mach-bcm283x/Kconfig
> @@ -202,10 +202,4 @@ config SYS_SOC
>   config SYS_CONFIG_NAME
>   	default "rpi"
>   
> -config BCM283x_BASE
> -	hex
> -	default "0x20000000" if BCM2835
> -	default "0x3f000000" if BCM2836 || BCM2837
> -	default "0xfe000000" if BCM2711
> -
>   endmenu
> diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
> index 9dcc96ba2e..214e1078eb 100644
> --- a/arch/arm/mach-bcm283x/init.c
> +++ b/arch/arm/mach-bcm283x/init.c
> @@ -7,9 +7,49 @@
>    */
>   
>   #include <common.h>
> +#include <dm/device.h>
> +
> +#define PDATA_BCM2835	0
> +#define PDATA_BCM2836	1
> +#define PDATA_BCM2837	2
> +#define PDATA_BCM2838	3
>   
>   extern unsigned long rpi_bcm283x_base;
>   
> +struct bcm283x_pdata {
> +	unsigned long io_base;
> +};
> +
> +struct bcm283x_pdata pdata_bcm283x[] = {
> +	[PDATA_BCM2835] = {
> +		.io_base = 0x20000000,
> +	},
> +	[PDATA_BCM2836] = {
> +		.io_base = 0x3f000000,
> +	},
> +#ifdef CONFIG_ARM64
> +	[PDATA_BCM2837] = {
> +		.io_base = 0x3f000000,
> +	},
> +	[PDATA_BCM2838] = {
> +		.io_base = 0xfe000000,
> +	},
> +#endif
> +};
> +
> +/*
> + * I/O address space varies on different chip versions.
> + * We set the base address by inspecting the DTB.
> + */
> +static const struct udevice_id board_ids[] = {
> +	{ .compatible = "brcm,bcm2835", .data = PDATA_BCM2835},
> +	{ .compatible = "brcm,bcm2836", .data = PDATA_BCM2836},
> +	{ .compatible = "brcm,bcm2837", .data = PDATA_BCM2837},
> +	{ .compatible = "brcm,bcm2838", .data = PDATA_BCM2838},
> +	{ .compatible = "brcm,bcm2711", .data = PDATA_BCM2838},


Does this match all of the downstream dtbs as well as the upstream ones?


Alex


> +	{ },
> +};
> +
>   int arch_cpu_init(void)
>   {
>   	icache_enable();
> @@ -19,10 +59,28 @@ int arch_cpu_init(void)
>   
>   int mach_cpu_init(void)
>   {
> -	rpi_bcm283x_base = CONFIG_BCM283x_BASE;
> +	const struct udevice_id *of_match = board_ids;
> +	int ret;
> +
> +	rpi_bcm283x_base = 0;
> +
> +	while (of_match->compatible) {
> +		struct bcm283x_pdata pdat;
> +
> +		ret = fdt_node_check_compatible(gd->fdt_blob, 0,
> +						of_match->compatible);
> +		if (!ret) {
> +			pdat = pdata_bcm283x[of_match->data];
> +			rpi_bcm283x_base = pdat.io_base;
> +			break;
> +		}
> +
> +		of_match++;
> +	}
>   
>   	return 0;
>   }
> +
>   #ifdef CONFIG_ARMV7_LPAE
>   void enable_caches(void)
>   {
Matthias Brugger Sept. 27, 2019, 12:10 p.m. UTC | #2 
On 27/09/2019 12:12, Alexander Graf wrote:
> 
> On 27.09.19 11:00, matthias.bgg@kernel.org wrote:
>> From: Matthias Brugger <mbrugger@suse.com>
>>
>> As part of the effort to create one binary for several bcm83x SoCs
>> we use the SoC compatible to decide which IO base address we use.
>>
>> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
>> ---
>>
>>   arch/arm/mach-bcm283x/Kconfig |  6 ----
>>   arch/arm/mach-bcm283x/init.c  | 60 ++++++++++++++++++++++++++++++++++-
>>   2 files changed, 59 insertions(+), 7 deletions(-)
>>
>> diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig
>> index b08275f598..e8e0ff0eb4 100644
>> --- a/arch/arm/mach-bcm283x/Kconfig
>> +++ b/arch/arm/mach-bcm283x/Kconfig
>> @@ -202,10 +202,4 @@ config SYS_SOC
>>   config SYS_CONFIG_NAME
>>       default "rpi"
>>   -config BCM283x_BASE
>> -    hex
>> -    default "0x20000000" if BCM2835
>> -    default "0x3f000000" if BCM2836 || BCM2837
>> -    default "0xfe000000" if BCM2711
>> -
>>   endmenu
>> diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
>> index 9dcc96ba2e..214e1078eb 100644
>> --- a/arch/arm/mach-bcm283x/init.c
>> +++ b/arch/arm/mach-bcm283x/init.c
>> @@ -7,9 +7,49 @@
>>    */
>>     #include <common.h>
>> +#include <dm/device.h>
>> +
>> +#define PDATA_BCM2835    0
>> +#define PDATA_BCM2836    1
>> +#define PDATA_BCM2837    2
>> +#define PDATA_BCM2838    3
>>     extern unsigned long rpi_bcm283x_base;
>>   +struct bcm283x_pdata {
>> +    unsigned long io_base;
>> +};
>> +
>> +struct bcm283x_pdata pdata_bcm283x[] = {
>> +    [PDATA_BCM2835] = {
>> +        .io_base = 0x20000000,
>> +    },
>> +    [PDATA_BCM2836] = {
>> +        .io_base = 0x3f000000,
>> +    },
>> +#ifdef CONFIG_ARM64
>> +    [PDATA_BCM2837] = {
>> +        .io_base = 0x3f000000,
>> +    },
>> +    [PDATA_BCM2838] = {
>> +        .io_base = 0xfe000000,
>> +    },
>> +#endif
>> +};
>> +
>> +/*
>> + * I/O address space varies on different chip versions.
>> + * We set the base address by inspecting the DTB.
>> + */
>> +static const struct udevice_id board_ids[] = {
>> +    { .compatible = "brcm,bcm2835", .data = PDATA_BCM2835},
>> +    { .compatible = "brcm,bcm2836", .data = PDATA_BCM2836},
>> +    { .compatible = "brcm,bcm2837", .data = PDATA_BCM2837},
>> +    { .compatible = "brcm,bcm2838", .data = PDATA_BCM2838},
>> +    { .compatible = "brcm,bcm2711", .data = PDATA_BCM2838},
> 
> 
> Does this match all of the downstream dtbs as well as the upstream ones?
> 

Yes, for RPi[1-3] upstream and downstream are the same for RPi4 the RaspberryPi
FW is getting fixes by adding the upstream compatible, so I added both, the old
downstream (bcm2838) and the upstream (bcm2711) one.

Regards,
Matthias

> 
> Alex
> 
> 
>> +    { },
>> +};
>> +
>>   int arch_cpu_init(void)
>>   {
>>       icache_enable();
>> @@ -19,10 +59,28 @@ int arch_cpu_init(void)
>>     int mach_cpu_init(void)
>>   {
>> -    rpi_bcm283x_base = CONFIG_BCM283x_BASE;
>> +    const struct udevice_id *of_match = board_ids;
>> +    int ret;
>> +
>> +    rpi_bcm283x_base = 0;
>> +
>> +    while (of_match->compatible) {
>> +        struct bcm283x_pdata pdat;
>> +
>> +        ret = fdt_node_check_compatible(gd->fdt_blob, 0,
>> +                        of_match->compatible);
>> +        if (!ret) {
>> +            pdat = pdata_bcm283x[of_match->data];
>> +            rpi_bcm283x_base = pdat.io_base;
>> +            break;
>> +        }
>> +
>> +        of_match++;
>> +    }
>>         return 0;
>>   }
>> +
>>   #ifdef CONFIG_ARMV7_LPAE
>>   void enable_caches(void)
>>   {
diff mbox series

Patch

diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig
index b08275f598..e8e0ff0eb4 100644
--- a/arch/arm/mach-bcm283x/Kconfig
+++ b/arch/arm/mach-bcm283x/Kconfig
@@ -202,10 +202,4 @@  config SYS_SOC
 config SYS_CONFIG_NAME
 	default "rpi"
 
-config BCM283x_BASE
-	hex
-	default "0x20000000" if BCM2835
-	default "0x3f000000" if BCM2836 || BCM2837
-	default "0xfe000000" if BCM2711
-
 endmenu
diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
index 9dcc96ba2e..214e1078eb 100644
--- a/arch/arm/mach-bcm283x/init.c
+++ b/arch/arm/mach-bcm283x/init.c
@@ -7,9 +7,49 @@ 
  */
 
 #include <common.h>
+#include <dm/device.h>
+
+#define PDATA_BCM2835	0
+#define PDATA_BCM2836	1
+#define PDATA_BCM2837	2
+#define PDATA_BCM2838	3
 
 extern unsigned long rpi_bcm283x_base;
 
+struct bcm283x_pdata {
+	unsigned long io_base;
+};
+
+struct bcm283x_pdata pdata_bcm283x[] = {
+	[PDATA_BCM2835] = {
+		.io_base = 0x20000000,
+	},
+	[PDATA_BCM2836] = {
+		.io_base = 0x3f000000,
+	},
+#ifdef CONFIG_ARM64
+	[PDATA_BCM2837] = {
+		.io_base = 0x3f000000,
+	},
+	[PDATA_BCM2838] = {
+		.io_base = 0xfe000000,
+	},
+#endif
+};
+
+/*
+ * I/O address space varies on different chip versions.
+ * We set the base address by inspecting the DTB.
+ */
+static const struct udevice_id board_ids[] = {
+	{ .compatible = "brcm,bcm2835", .data = PDATA_BCM2835},
+	{ .compatible = "brcm,bcm2836", .data = PDATA_BCM2836},
+	{ .compatible = "brcm,bcm2837", .data = PDATA_BCM2837},
+	{ .compatible = "brcm,bcm2838", .data = PDATA_BCM2838},
+	{ .compatible = "brcm,bcm2711", .data = PDATA_BCM2838},
+	{ },
+};
+
 int arch_cpu_init(void)
 {
 	icache_enable();
@@ -19,10 +59,28 @@  int arch_cpu_init(void)
 
 int mach_cpu_init(void)
 {
-	rpi_bcm283x_base = CONFIG_BCM283x_BASE;
+	const struct udevice_id *of_match = board_ids;
+	int ret;
+
+	rpi_bcm283x_base = 0;
+
+	while (of_match->compatible) {
+		struct bcm283x_pdata pdat;
+
+		ret = fdt_node_check_compatible(gd->fdt_blob, 0,
+						of_match->compatible);
+		if (!ret) {
+			pdat = pdata_bcm283x[of_match->data];
+			rpi_bcm283x_base = pdat.io_base;
+			break;
+		}
+
+		of_match++;
+	}
 
 	return 0;
 }
+
 #ifdef CONFIG_ARMV7_LPAE
 void enable_caches(void)
 {