From patchwork Thu Aug 22 10:26:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 1151468 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=public-files.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46DgpL0zlZz9sN6 for ; Thu, 22 Aug 2019 20:32:42 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 32779C220AE; Thu, 22 Aug 2019 10:29:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 0FD2FC220AC; Thu, 22 Aug 2019 10:27:55 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 356A1C22074; Thu, 22 Aug 2019 10:27:32 +0000 (UTC) Received: from mxwww.masterlogin.de (mxwww.masterlogin.de [95.129.51.220]) by lists.denx.de (Postfix) with ESMTPS id 345C6C22061 for ; Thu, 22 Aug 2019 10:27:30 +0000 (UTC) Received: from mxout2.routing.net (unknown [192.168.10.82]) by new.mxwww.masterlogin.de (Postfix) with ESMTPS id 79B8E96E99; Thu, 22 Aug 2019 10:27:29 +0000 (UTC) Received: from mxbox3.masterlogin.de (unknown [192.168.10.253]) by mxout2.routing.net (Postfix) with ESMTP id DB4BD61FD8; Thu, 22 Aug 2019 10:27:29 +0000 (UTC) Received: from localhost.localdomain (fttx-pool-217.61.154.89.bambit.de [217.61.154.89]) by mxbox3.masterlogin.de (Postfix) with ESMTPSA id 5545A36067D; Thu, 22 Aug 2019 12:27:29 +0200 (CEST) From: Frank Wunderlich To: u-boot@lists.denx.de Date: Thu, 22 Aug 2019 12:26:56 +0200 Message-Id: <20190822102656.4993-9-frank-w@public-files.de> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190822102656.4993-1-frank-w@public-files.de> References: <20190822102656.4993-1-frank-w@public-files.de> Cc: Ryder Lee , GSS_MTK_Uboot_upstream Subject: [U-Boot] [PATCH v4 8/8] ata: ahci: Don't forget to clear upper address regs. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Oleksandr Rybalko In 32bits mode upper bits need to be set to 0, otherwise controller will try to DMA into not existing memory and stops with error. Tested-by: Frank Wunderlich Signed-off-by: Frank Wunderlich Signed-off-by: Oleksandr Rybalko --- changes since v3: fix build warning on x86_64 changes since v2: none --- drivers/ata/ahci.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index e3135bb75f..3d782b0944 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -548,6 +548,7 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port) { struct ahci_ioports *pp = &(uc_priv->port[port]); void __iomem *port_mmio = pp->port_mmio; + u64 dma_addr; u32 port_status; void __iomem *mem; @@ -593,10 +594,12 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port) pp->cmd_tbl_sg = (struct ahci_sg *)(uintptr_t)virt_to_phys((void *)mem); - writel_with_flush((unsigned long)pp->cmd_slot, - port_mmio + PORT_LST_ADDR); - - writel_with_flush(pp->rx_fis, port_mmio + PORT_FIS_ADDR); + dma_addr = (ulong)pp->cmd_slot; + writel_with_flush(dma_addr, port_mmio + PORT_LST_ADDR); + writel_with_flush(dma_addr >> 32, port_mmio + PORT_LST_ADDR_HI); + dma_addr = (ulong)pp->rx_fis; + writel_with_flush(dma_addr, port_mmio + PORT_FIS_ADDR); + writel_with_flush(dma_addr >> 32, port_mmio + PORT_FIS_ADDR_HI); #ifdef CONFIG_SUNXI_AHCI sunxi_dma_init(port_mmio);