From patchwork Fri Aug 16 22:30:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 1148479 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="pzmXntjK"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 469J1X57VFz9sBF for ; Sat, 17 Aug 2019 08:30:38 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 96FF2C21C93; Fri, 16 Aug 2019 22:30:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E70B1C21C29; Fri, 16 Aug 2019 22:30:27 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 51D7BC21C29; Fri, 16 Aug 2019 22:30:27 +0000 (UTC) Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lists.denx.de (Postfix) with ESMTPS id 87684C21BE5 for ; Fri, 16 Aug 2019 22:30:26 +0000 (UTC) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x7GMUO7r098536; Fri, 16 Aug 2019 17:30:24 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1565994624; bh=3KbF45rA0PdTxL3xZ5EbysZXBDrRfqQ0eUDVHiZkOXw=; h=From:To:CC:Subject:Date; b=pzmXntjK2aAx/Tv5tzX0zK/ikfU3XOwNGeO5DR3ab5ZiwnTO5CTiz1VbBlH8DaRgQ 8twDBTepqioOtM809Tunysu5qWSDfwi3YA9TfuwbFozX5fZNFOmwBqBP8hbjwG0rAb /w2A+DMY2/r43/uuF4YQYr8GjwARYk3l5WNNPYk4= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x7GMUOle097120 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 16 Aug 2019 17:30:24 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Fri, 16 Aug 2019 17:30:24 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Fri, 16 Aug 2019 17:30:24 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id x7GMUOEi076913; Fri, 16 Aug 2019 17:30:24 -0500 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id x7GMUNZ04458; Fri, 16 Aug 2019 17:30:23 -0500 (CDT) From: Suman Anna To: Tom Rini Date: Fri, 16 Aug 2019 17:30:16 -0500 Message-ID: <20190816223016.28983-1-s-anna@ti.com> X-Mailer: git-send-email 2.22.0 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: Tero Kristo , u-boot@lists.denx.de Subject: [U-Boot] [PATCH] ARM: DRA7: Fixup DPLL clock rate fixup logic for newer kernels X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The commit 1b42ab3eda8a ("ARM: DRA7: Fixup DSPEVE, IVA and GPU clock frequencies based on OPP") updates the kernel device-tree blob to adjust the DSP, IVA and GPU DPLL clocks based on a one-time OPP choice selected in U-Boot. All these DPLL clocks are children of the cm_core_aon clocks DT node. The hierarchy of this clocks DT node has changed in newer Linux kernels starting from v5.0, and this results in a failure in ft_fixup_clocks() function to update the clock rates on these newer kernels. Fix this by updating the lookup logic to look through both the newer and older DT hierarchy paths for the cm_core_aon clocks node. Signed-off-by: Suman Anna --- arch/arm/mach-omap2/omap5/fdt.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/omap5/fdt.c b/arch/arm/mach-omap2/omap5/fdt.c index 3626d79199af..8dee555c10c6 100644 --- a/arch/arm/mach-omap2/omap5/fdt.c +++ b/arch/arm/mach-omap2/omap5/fdt.c @@ -201,7 +201,9 @@ static int ft_fixup_clocks(void *fdt, const char **names, u32 *rates, int num) int offs, node_offs, ret, i; uint32_t phandle; - offs = fdt_path_offset(fdt, "/ocp/l4@4a000000/cm_core_aon@5000/clocks"); + offs = fdt_path_offset(fdt, "/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks"); + if (offs < 0) + offs = fdt_path_offset(fdt, "/ocp/l4@4a000000/cm_core_aon@5000/clocks"); if (offs < 0) { debug("Could not find cm_core_aon clocks node path offset : %s\n", fdt_strerror(offs));