From patchwork Fri Jun 21 03:42:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangbo Lu X-Patchwork-Id: 1120166 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45Vc4v2LrTz9s4V for ; Fri, 21 Jun 2019 21:33:19 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 020EDC21E1A; Fri, 21 Jun 2019 11:32:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=KHOP_BIG_TO_CC autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 00630C21E31; Fri, 21 Jun 2019 11:31:29 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id A748EC21C6A; Fri, 21 Jun 2019 03:41:37 +0000 (UTC) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lists.denx.de (Postfix) with ESMTPS id 5DFEBC21C38 for ; Fri, 21 Jun 2019 03:41:37 +0000 (UTC) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 2E3B51A096F; Fri, 21 Jun 2019 05:41:37 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 2AFD41A0100; Fri, 21 Jun 2019 05:40:59 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 40500402CF; Fri, 21 Jun 2019 11:40:44 +0800 (SGT) From: Yangbo Lu To: u-boot@lists.denx.de Date: Fri, 21 Jun 2019 11:42:27 +0800 Message-Id: <20190621034230.8639-3-yangbo.lu@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190621034230.8639-1-yangbo.lu@nxp.com> References: <20190621034230.8639-1-yangbo.lu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Mailman-Approved-At: Fri, 21 Jun 2019 11:31:26 +0000 Cc: =?utf-8?q?Eddy_Petri=C8=99or?= , Nikita Kiryanov , Patrick Bruenn , Adrian Alonso , Bhaskar Upadhaya , Vanessa Maegima , Albert ARIBAUD , "NXP i . MX U-Boot Team" , Ken Lin , Stefan Roese , Richard Hu , Marek Vasut , Max Krummenacher , Stefan Agner , Ian Ray , Andrej Rosano , Simone CIANNI , Markus Niebel , Jason Liu , Ingo Schroeck , Andreas Geisreiter , Otavio Salvador , Parthiban Nallathambi , Breno Lima , Alison Wang , Raffaele RECALCATI , Akshay Bhat , Ludwig Zenz , Olaf Mandel , =?utf-8?q?Antti_M=C3=A4entausta?= , Martyn Welch , Soeren Moch , Francesco Montefoschi Subject: [U-Boot] [v8, 2/5] mmc: split fsl_esdhc driver for i.MX X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX initially. The later QoriQ series PowerPC processors (which were evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and i.MX series processors were using this driver for their eSDHCs too. For the two series processors, the eSDHCs are becoming more and more different. We should have split it into two drivers, like them (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel. This patch is just to create a fsl_esdhc_imx driver which is a copy of fsl_esdhc driver for i.MX processors. We will convert i.MX processors to use fsl_esdhc_imx, and clean up the two drivers separately in the future patches. Signed-off-by: Yangbo Lu Tested-by: Steffen Dirkwinkel Reviewed-by: Peng Fan Reviewed-by: Martyn Welch --- Changes for v2: - None. Changes for v3: - None. Changes for v4: - Used "Enhanced Secure Digital Host" in Kconfig help. - Moved copyright to top line and added my info. - Added Tested-by/Reviewed-by. Changes for v5: - None. Changes for v6: - None. Changes for v7: - Rebased. - Added Reviewed-by. Changes for v8: - None. --- drivers/mmc/Kconfig | 10 ++++++++-- drivers/mmc/Makefile | 1 + drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} | 5 +++-- include/{fsl_esdhc.h => fsl_esdhc_imx.h} | 13 ++++++++----- 4 files changed, 20 insertions(+), 9 deletions(-) copy drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} (99%) copy include/{fsl_esdhc.h => fsl_esdhc_imx.h} (97%) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c23299e..9358872 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -668,8 +668,14 @@ config TEGRA124_MMC_DISABLE_EXT_LOOPBACK config FSL_ESDHC bool "Freescale/NXP eSDHC controller support" help - This selects support for the eSDHC (enhanced secure digital host - controller) found on numerous Freescale/NXP SoCs. + This selects support for the eSDHC (Enhanced Secure Digital Host + Controller) found on numerous Freescale/NXP SoCs. + +config FSL_ESDHC_IMX + bool "Freescale/NXP i.MX eSDHC controller support" + help + This selects support for the i.MX eSDHC (Enhanced Secure Digital Host + Controller) found on numerous Freescale/NXP SoCs. endmenu diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 0076fc3..3c8c53a 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -26,6 +26,7 @@ obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o obj-$(CONFIG_MMC_DW_SNPS) += snps_dw_mmc.o obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o +obj-$(CONFIG_FSL_ESDHC_IMX) += fsl_esdhc_imx.o obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o obj-$(CONFIG_MMC_MESON_GX) += meson_gx_mmc.o diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc_imx.c similarity index 99% copy from drivers/mmc/fsl_esdhc.c copy to drivers/mmc/fsl_esdhc_imx.c index 6a191a1..797bdbb 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -3,6 +3,7 @@ * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc * Copyright 2019 NXP Semiconductors * Andy Fleming + * Yangbo Lu * * Based vaguely on the pxa mmc code: * (C) Copyright 2003 @@ -19,7 +20,7 @@ #include #include #include -#include +#include #include #include #include @@ -116,7 +117,7 @@ struct esdhc_soc_data { * @non_removable: 0: removable; 1: non-removable * @wp_enable: 1: enable checking wp; 0: no check * @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V - * @flags: ESDHC_FLAG_xx in include/fsl_esdhc.h + * @flags: ESDHC_FLAG_xx in include/fsl_esdhc_imx.h * @caps: controller capabilities * @tuning_step: tuning step setting in tuning_ctrl register * @start_tuning_tap: the start point for tuning in tuning_ctrl register diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc_imx.h similarity index 97% copy from include/fsl_esdhc.h copy to include/fsl_esdhc_imx.h index 8dbd524..67fd289 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc_imx.h @@ -3,11 +3,14 @@ * FSL SD/MMC Defines *------------------------------------------------------------------- * + * Copyright 2019 NXP + * Yangbo Lu + * * Copyright 2007-2008,2010-2011 Freescale Semiconductor, Inc */ -#ifndef __FSL_ESDHC_H__ -#define __FSL_ESDHC_H__ +#ifndef __FSL_ESDHC_IMX_H__ +#define __FSL_ESDHC_IMX_H__ #include #include @@ -258,15 +261,15 @@ struct fsl_esdhc_cfg { #error "Endianess is not defined: please fix to continue" #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int fsl_esdhc_mmc_init(bd_t *bis); int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg); void fdt_fixup_esdhc(void *blob, bd_t *bd); #else static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; } static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {} -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ void __noreturn mmc_boot(void); void mmc_spl_load_image(uint32_t offs, unsigned int size, void *vdst); -#endif /* __FSL_ESDHC_H__ */ +#endif /* __FSL_ESDHC_IMX_H__ */