@@ -668,8 +668,14 @@ config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
config FSL_ESDHC
bool "Freescale/NXP eSDHC controller support"
help
- This selects support for the eSDHC (enhanced secure digital host
- controller) found on numerous Freescale/NXP SoCs.
+ This selects support for the eSDHC (Enhanced Secure Digital Host
+ Controller) found on numerous Freescale/NXP SoCs.
+
+config FSL_ESDHC_IMX
+ bool "Freescale/NXP i.MX eSDHC controller support"
+ help
+ This selects support for the i.MX eSDHC (Enhanced Secure Digital Host
+ Controller) found on numerous Freescale/NXP SoCs.
endmenu
@@ -26,6 +26,7 @@ obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o
obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o
obj-$(CONFIG_MMC_DW_SNPS) += snps_dw_mmc.o
obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
+obj-$(CONFIG_FSL_ESDHC_IMX) += fsl_esdhc_imx.o
obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o
obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o
obj-$(CONFIG_MMC_MESON_GX) += meson_gx_mmc.o
similarity index 99%
copy from drivers/mmc/fsl_esdhc.c
copy to drivers/mmc/fsl_esdhc_imx.c
@@ -3,6 +3,7 @@
* Copyright 2007, 2010-2011 Freescale Semiconductor, Inc
* Copyright 2019 NXP Semiconductors
* Andy Fleming
+ * Yangbo Lu <yangbo.lu@nxp.com>
*
* Based vaguely on the pxa mmc code:
* (C) Copyright 2003
@@ -19,7 +20,7 @@
#include <part.h>
#include <power/regulator.h>
#include <malloc.h>
-#include <fsl_esdhc.h>
+#include <fsl_esdhc_imx.h>
#include <fdt_support.h>
#include <asm/io.h>
#include <dm.h>
@@ -116,7 +117,7 @@ struct esdhc_soc_data {
* @non_removable: 0: removable; 1: non-removable
* @wp_enable: 1: enable checking wp; 0: no check
* @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V
- * @flags: ESDHC_FLAG_xx in include/fsl_esdhc.h
+ * @flags: ESDHC_FLAG_xx in include/fsl_esdhc_imx.h
* @caps: controller capabilities
* @tuning_step: tuning step setting in tuning_ctrl register
* @start_tuning_tap: the start point for tuning in tuning_ctrl register
similarity index 97%
copy from include/fsl_esdhc.h
copy to include/fsl_esdhc_imx.h
@@ -3,11 +3,14 @@
* FSL SD/MMC Defines
*-------------------------------------------------------------------
*
+ * Copyright 2019 NXP
+ * Yangbo Lu <yangbo.lu@nxp.com>
+ *
* Copyright 2007-2008,2010-2011 Freescale Semiconductor, Inc
*/
-#ifndef __FSL_ESDHC_H__
-#define __FSL_ESDHC_H__
+#ifndef __FSL_ESDHC_IMX_H__
+#define __FSL_ESDHC_IMX_H__
#include <linux/bitops.h>
#include <linux/errno.h>
@@ -258,15 +261,15 @@ struct fsl_esdhc_cfg {
#error "Endianess is not defined: please fix to continue"
#endif
-#ifdef CONFIG_FSL_ESDHC
+#ifdef CONFIG_FSL_ESDHC_IMX
int fsl_esdhc_mmc_init(bd_t *bis);
int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg);
void fdt_fixup_esdhc(void *blob, bd_t *bd);
#else
static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; }
static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {}
-#endif /* CONFIG_FSL_ESDHC */
+#endif /* CONFIG_FSL_ESDHC_IMX */
void __noreturn mmc_boot(void);
void mmc_spl_load_image(uint32_t offs, unsigned int size, void *vdst);
-#endif /* __FSL_ESDHC_H__ */
+#endif /* __FSL_ESDHC_IMX_H__ */