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Wed, 19 Jun 2019 04:01:10 +0000 Received: from DM6PR04MB6059.namprd04.prod.outlook.com ([fe80::408b:3614:6cbf:6d84]) by DM6PR04MB6059.namprd04.prod.outlook.com ([fe80::408b:3614:6cbf:6d84%7]) with mapi id 15.20.1987.013; Wed, 19 Jun 2019 04:01:10 +0000 From: Anup Patel To: Rick Chen , Bin Meng , Lukas Auer , Simon Glass Thread-Topic: [PATCH v2 3/6] clk: sifive: Sync-up DT bindings header with upstream Linux Thread-Index: AQHVJlOhnAtHZzbQD0qiaelkQcW9JQ== Date: Wed, 19 Jun 2019 04:01:10 +0000 Message-ID: <20190619040027.5011-4-anup.patel@wdc.com> References: <20190619040027.5011-1-anup.patel@wdc.com> In-Reply-To: <20190619040027.5011-1-anup.patel@wdc.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MA1PR0101CA0012.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:21::22) To DM6PR04MB6059.namprd04.prod.outlook.com (2603:10b6:5:129::25) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Anup.Patel@wdc.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [129.253.179.161] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 5b2927e1-3029-4403-27bf-08d6f46ac36c x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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SFP:1102; SCL:1; SRVR:DM6PR04MB4188; H:DM6PR04MB6059.namprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: KNOoUFrnsORoYfpC+v9HdUJUvUpkRU5D9ZYAhLz9Yf04e5UoZtowIsXvs+OOBrpMZosOu+fqQ3IIB3T52vmuBl39YRO0e1zChpFRyaMAaCitzcWpxJEhKZwY6fsAm9y7kacgt1FJl2PYWGdzlztSDNZ8Hpz3SHpPFVaKhyjr8SDUSp3gNHvbKLuhAp9Gw6ZLMxDenkbIkHaIbEIPvp82e54MiwJ6aFHlVYE/jeCt1DjE5Rwqs/1HA8q4xWPfo+OfCtACH/wnNZRTiyFokjQL9gbejvdlf8SSM/R/Hq+4zeqCDNveMV7TjXeqPcXrjVDp6wC5IbcXouWnPmoAoOJugXO3bU3N5fB/cQGjJrjMlzTZ43r9n1bolibZB/wV4FCGmLpHI1LRkhaWiUs64aIqROO6X8UDQU/8ofdGSTldOyg= MIME-Version: 1.0 X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5b2927e1-3029-4403-27bf-08d6f46ac36c X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Jun 2019 04:01:10.4598 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Anup.Patel@wdc.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR04MB4188 Cc: Palmer Dabbelt , U-Boot Mailing List Subject: [U-Boot] [PATCH v2 3/6] clk: sifive: Sync-up DT bindings header with upstream Linux X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The location and license header of DT bindings header for SiFive clock driver has changed in upstream Linux hence this patch. Signed-off-by: Anup Patel --- drivers/clk/sifive/fu540-prci.c | 2 +- include/dt-bindings/clk/sifive-fu540-prci.h | 29 ------------------- include/dt-bindings/clock/sifive-fu540-prci.h | 18 ++++++++++++ 3 files changed, 19 insertions(+), 30 deletions(-) delete mode 100644 include/dt-bindings/clk/sifive-fu540-prci.h create mode 100644 include/dt-bindings/clock/sifive-fu540-prci.h diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c index cdbf35e871..ceb318e062 100644 --- a/drivers/clk/sifive/fu540-prci.c +++ b/drivers/clk/sifive/fu540-prci.c @@ -38,7 +38,7 @@ #include #include -#include +#include /* * EXPECTED_CLK_PARENT_COUNT: how many parent clocks this driver expects: diff --git a/include/dt-bindings/clk/sifive-fu540-prci.h b/include/dt-bindings/clk/sifive-fu540-prci.h deleted file mode 100644 index 531523ea62..0000000000 --- a/include/dt-bindings/clk/sifive-fu540-prci.h +++ /dev/null @@ -1,29 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 Western Digital Corporation or its affiliates. - * - * Copyright (C) 2018 SiFive, Inc. - * Wesley Terpstra - * Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __LINUX_CLK_SIFIVE_FU540_PRCI_H -#define __LINUX_CLK_SIFIVE_FU540_PRCI_H - -/* Clock indexes for use by Device Tree data */ - -#define PRCI_CLK_COREPLL 0 -#define PRCI_CLK_DDRPLL 1 -#define PRCI_CLK_GEMGXLPLL 2 -#define PRCI_CLK_TLCLK 3 - -#endif diff --git a/include/dt-bindings/clock/sifive-fu540-prci.h b/include/dt-bindings/clock/sifive-fu540-prci.h new file mode 100644 index 0000000000..6a0b70a37d --- /dev/null +++ b/include/dt-bindings/clock/sifive-fu540-prci.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018-2019 SiFive, Inc. + * Wesley Terpstra + * Paul Walmsley + */ + +#ifndef __DT_BINDINGS_CLOCK_SIFIVE_FU540_PRCI_H +#define __DT_BINDINGS_CLOCK_SIFIVE_FU540_PRCI_H + +/* Clock indexes for use by Device Tree data and the PRCI driver */ + +#define PRCI_CLK_COREPLL 0 +#define PRCI_CLK_DDRPLL 1 +#define PRCI_CLK_GEMGXLPLL 2 +#define PRCI_CLK_TLCLK 3 + +#endif