From patchwork Mon Jun 10 18:05:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramon Fried X-Patchwork-Id: 1113266 X-Patchwork-Delegate: daniel.schwierzeck@googlemail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="oHwbLuhm"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45N1Kg1CLhz9s00 for ; Tue, 11 Jun 2019 04:06:31 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id E20A1C2206B; Mon, 10 Jun 2019 18:06:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 2F3FEC2205E; Mon, 10 Jun 2019 18:06:02 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 020B8C22053; Mon, 10 Jun 2019 18:05:51 +0000 (UTC) Received: from mail-wm1-f67.google.com (mail-wm1-f67.google.com [209.85.128.67]) by lists.denx.de (Postfix) with ESMTPS id 00AF9C2206C for ; Mon, 10 Jun 2019 18:05:48 +0000 (UTC) Received: by mail-wm1-f67.google.com with SMTP id u8so268747wmm.1 for ; Mon, 10 Jun 2019 11:05:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RFbBRhnHZftbhCPC0MgLxGsNiVc9fCU6Y4PiHN3UScA=; b=oHwbLuhmwtBDOYJRl9FrHdvO9m8iVFE2pQ59Ye+YOXRo5jbOAO9H98IDoE2/q0Qmt5 xNI156VB4GcmSPN0OgeI5lZII0k9d6g5mrheDLX/7f4/GYZgzlxyz1pcAm37X/9fHFOg RcQG+LflpaQk3sSR4Dw59R0qVat6L+1a6CHpr51s/j+bX5itSIckdtHKkw9VflzBhDAl R/HbIcnHcAr/+QzqeFgkSFsFiuSuwwWpRjjCalH4QNJS940qFpRCQ6ngxkO08WgnmE5m hT0hsL+/gYL4R8wh2xLw5GzyR1264ku/Eezx6XjSqPpQp8Pw5Zk7HzaXvSzgFV2xK9mD cupg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RFbBRhnHZftbhCPC0MgLxGsNiVc9fCU6Y4PiHN3UScA=; b=WzS1PBpFZZuSo/UrIZK5dpi6PSP1RgbiikwJcjPHBtrbLWNqe3tMUu95N0zmuTye84 38iH4u0Maj+bs+ccvZKmNHAmQoUYyn6VowoI/xviFuWjXTArNuly6fNdPG/DwmWBIzrl hzy95ucVq+O1R1wkk41cxm1ZJuxorG3tSlHZQrU2LgThGsmZvqgsZJu8sWTPg9neuyLp czb7KwTbjuPkbjRzHLho3DPluT3hkTKF7g/40BhjXOvvnkGeTbQNjDOfX+DMNPtGd/FM jLdxVTIwGVUaUz0ZMNkYbSk8ePE0imVCWBZzK4dAMEXMv2tfX1qMG+/yjmmd4WptP876 xN7Q== X-Gm-Message-State: APjAAAV/XP8O4H7uC6GPudvlOGVpq1hgaZymWr/MipP9t8m67/1Nm2R4 swKve8KWS9WlzizKyRk4Fn3UUpjeDec= X-Google-Smtp-Source: APXvYqzadaVCqJL5nbpOv1MqnCqdeG7DNqvRUw/nQ07lI/YfNEqZfmyK9o0fHF9u72xly6a/r9/UBg== X-Received: by 2002:a1c:6154:: with SMTP id v81mr14177057wmb.92.1560189947641; Mon, 10 Jun 2019 11:05:47 -0700 (PDT) Received: from localhost.localdomain ([141.226.31.91]) by smtp.gmail.com with ESMTPSA id j123sm173334wmb.32.2019.06.10.11.05.46 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 10 Jun 2019 11:05:47 -0700 (PDT) From: Ramon Fried To: daniel.schwierzeck@gmail.com, u-boot@lists.denx.de Date: Mon, 10 Jun 2019 21:05:26 +0300 Message-Id: <20190610180526.11262-3-rfried.dev@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190610180526.11262-1-rfried.dev@gmail.com> References: <20190610180526.11262-1-rfried.dev@gmail.com> MIME-Version: 1.0 Subject: [U-Boot] [PATCH] MIPS: add compile time definition of L2 cache size X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" If configuration is set to skip low level init, automatic probe of L2 cache size is not performed and the size is set to 0. Flushing or invalidating the L2 cache will fail in this case. Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0. Signed-off-by: Ramon Fried --- arch/mips/Kconfig | 10 +++++++++- arch/mips/lib/cache.c | 2 +- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 5cb9bdf2ee..235bb5b7e6 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -408,9 +408,17 @@ config SYS_ICACHE_LINE_SIZE help The size of L1 Icache lines, if known at compile time. +config SYS_SCACHE_LINE_SIZE + int + default 0 + help + The size of L2 cache lines, if known at compile time. + + config SYS_CACHE_SIZE_AUTO def_bool y if SYS_DCACHE_SIZE = 0 && SYS_ICACHE_SIZE = 0 && \ - SYS_DCACHE_LINE_SIZE = 0 && SYS_ICACHE_LINE_SIZE = 0 + SYS_DCACHE_LINE_SIZE = 0 && SYS_ICACHE_LINE_SIZE = 0 && \ + SYS_SCACHE_LINE_SIZE = 0 help Select this (or let it be auto-selected by not defining any cache sizes) in order to allow U-Boot to automatically detect the sizes diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c index d56fd1e0f4..0ddae30f2c 100644 --- a/arch/mips/lib/cache.c +++ b/arch/mips/lib/cache.c @@ -87,7 +87,7 @@ static inline unsigned long scache_line_size(void) #ifdef CONFIG_MIPS_L2_CACHE return gd->arch.l2_line_size; #else - return 0; + return CONFIG_SYS_SCACHE_LINE_SIZE; #endif }