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Lu" To: "u-boot@lists.denx.de" Thread-Topic: [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code Thread-Index: AQHVD7KaRy1+YjnSDE61UBkPAGwDFQ== Date: Tue, 21 May 2019 08:53:04 +0000 Message-ID: <20190521085215.6263-6-yangbo.lu@nxp.com> References: <20190521085215.6263-1-yangbo.lu@nxp.com> In-Reply-To: <20190521085215.6263-1-yangbo.lu@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK2PR03CA0054.apcprd03.prod.outlook.com (2603:1096:202:17::24) To AM4PR0401MB2226.eurprd04.prod.outlook.com (2603:10a6:200:50::8) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yangbo.lu@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 13411060-3557-4e09-1765-08d6ddc9bc3f x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600141)(711020)(4605104)(4618075)(2017052603328)(7193020); SRVR:AM4PR0401MB2419; x-ms-traffictypediagnostic: AM4PR0401MB2419: x-ld-processed: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:7691; x-forefront-prvs: 0044C17179 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(346002)(136003)(396003)(376002)(366004)(39860400002)(199004)(189003)(2616005)(99286004)(486006)(2351001)(5660300002)(476003)(36756003)(71190400001)(71200400001)(52116002)(6116002)(3846002)(26005)(2906002)(2501003)(14454004)(256004)(54906003)(14444005)(86362001)(76176011)(316002)(4326008)(102836004)(6436002)(66556008)(7406005)(66476007)(7366002)(64756008)(66446008)(66066001)(73956011)(7416002)(66946007)(8676002)(6486002)(6916009)(186003)(53936002)(5640700003)(50226002)(6506007)(81156014)(386003)(6512007)(25786009)(478600001)(446003)(68736007)(8936002)(7736002)(81166006)(305945005)(1076003)(11346002); DIR:OUT; SFP:1101; SCL:1; SRVR:AM4PR0401MB2419; H:AM4PR0401MB2226.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: h8cUk5ivy9TCMNmZTNyFCkXMnIRRmY40HI3MjO06PCLb5oob3bGnfw4m7UOmJLQNPnKCmDQlTDe5jZShfwT/n7eWeQ0nKZnT2EUuy2qE7pdYYwFHEfZHeU+C67+sQAUi6azAMWi4E87wzHNdbW8GEGMUnDwKJ+zZk0rzcALn2WRn0zUbAVA+yn/00yYOKqEn1Mm1BsIwCYI/fLeIV82ih2COlp1XAMEwbVdY7Cm60PdXx06Pn1WzoXi5hAz6wgccxyR0kQmrU6tdX//xzPF2kiUbbdnVUBF51VlDkagkfn4ZrUUbPdxnFEd48SgQikF13lp/vweQt51AkqWUT/QTDQuLhUwCoONNl8QJDx2xfNTkf4lVm2r/fYzYP4mTOYcxO8ZmEARxYiVVQpeJFG1yTxJeTV+JJw2r85R3QAlqetc= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 13411060-3557-4e09-1765-08d6ddc9bc3f X-MS-Exchange-CrossTenant-originalarrivaltime: 21 May 2019 08:53:04.0464 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM4PR0401MB2419 X-Mailman-Approved-At: Tue, 21 May 2019 12:39:15 +0000 Cc: =?utf-8?q?Eddy_Petri=C8=99or?= , Nikita Kiryanov , Patrick Bruenn , Adrian Alonso , Bhaskar Upadhaya , Vanessa Maegima , Albert ARIBAUD , Joe Hershberger , =?utf-8?q?Eric_B=C3=A9nard?= , Ken Lin , Stefan Roese , Richard Hu , Marek Vasut , Boris Brezillon , Max Krummenacher , Stefan Agner , Ian Ray , Andrej Rosano , Fabien Lahoudere , Alexey Brodkin , Vinitha V Pillai , Simone CIANNI , Markus Niebel , Jason Liu , dl-uboot-imx , Ingo Schroeck , Andreas Geisreiter , Otavio Salvador , Parthiban Nallathambi , Breno Matheus Lima , Alison Wang , Lucile Quirion , Raffaele RECALCATI , Akshay Bhat , Ludwig Zenz , Olaf Mandel , =?utf-8?q?Antti_M=C3=A4entausta?= , Martyn Welch , Angelo Dureghello , Soeren Moch , Francesco Montefoschi Subject: [U-Boot] [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Dropped useless code for i.MX eSDHC driver. Signed-off-by: Yangbo Lu Tested-by: Angelo Dureghello --- Changes for v2: - Added this patch. Changes for v3: - None. --- drivers/mmc/fsl_esdhc_imx.c | 96 ++----------------------------------- include/fsl_esdhc_imx.h | 4 -- 2 files changed, 4 insertions(+), 96 deletions(-) diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index faf133390f..1c02e0eef1 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -259,8 +259,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) dma_addr_t addr; #endif uint wml_value; @@ -273,8 +272,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -310,8 +308,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -376,8 +373,7 @@ static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) dma_addr_t addr; addr = virt_to_phys((void *)(data->dest)); @@ -392,25 +388,6 @@ static void check_and_invalidate_dcache_range invalidate_dcache_range(start, end); } -#ifdef CONFIG_MCF5441x -/* - * Swaps 32-bit words to little-endian byte order. - */ -static inline void sd_swap_dma_buff(struct mmc_data *data) -{ - int i, size = data->blocksize >> 2; - u32 *buffer = (u32 *)data->dest; - u32 sw; - - while (data->blocks--) { - for (i = 0; i < size; i++) { - sw = __sw32(*buffer); - *buffer++ = sw; - } - } -} -#endif - /* * Sends a command out on the bus. Takes the mmc pointer, * a command pointer, and an optional data pointer. @@ -575,9 +552,6 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, */ if (data->flags & MMC_DATA_READ) { check_and_invalidate_dcache_range(cmd, data); -#ifdef CONFIG_MCF5441x - sd_swap_dma_buff(data); -#endif } #endif } @@ -1073,12 +1047,8 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) /* Disable the BRR and BWR bits in IRQSTAT */ esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR); -#ifdef CONFIG_MCF5441x - esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD); -#else /* Put the PROCTL reg back to the default */ esdhc_write32(®s->proctl, PROCTL_INIT); -#endif /* Set timout to the maximum value */ esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16); @@ -1186,11 +1156,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, if (ret) return ret; -#ifdef CONFIG_MCF5441x - /* ColdFire, using SDHC_DATA[3] for card detection */ - esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD); -#endif - #ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | SYSCTL_IPGEN | SYSCTL_CKEN); @@ -1215,15 +1180,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, voltage_caps = 0; caps = esdhc_read32(®s->hostcapblt); -#ifdef CONFIG_MCF5441x - /* - * MCF5441x RM declares in more points that sdhc clock speed must - * never exceed 25 Mhz. From this, the HS bit needs to be disabled - * from host capabilities. - */ - caps &= ~ESDHC_HOSTCAPBLT_HSS; -#endif - #ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30); @@ -1375,45 +1331,6 @@ int fsl_esdhc_mmc_init(bd_t *bis) } #endif -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -void mmc_adapter_card_type_ident(void) -{ - u8 card_id; - u8 value; - - card_id = QIXIS_READ(present) & QIXIS_SDID_MASK; - gd->arch.sdhc_adapter = card_id; - - switch (card_id) { - case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45: - value = QIXIS_READ(brdcfg[5]); - value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7); - QIXIS_WRITE(brdcfg[5], value); - break; - case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY: - value = QIXIS_READ(pwr_ctl[1]); - value |= QIXIS_EVDD_BY_SDHC_VS; - QIXIS_WRITE(pwr_ctl[1], value); - break; - case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44: - value = QIXIS_READ(brdcfg[5]); - value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT); - QIXIS_WRITE(brdcfg[5], value); - break; - case QIXIS_ESDHC_ADAPTER_TYPE_RSV: - break; - case QIXIS_ESDHC_ADAPTER_TYPE_MMC: - break; - case QIXIS_ESDHC_ADAPTER_TYPE_SD: - break; - case QIXIS_ESDHC_NO_ADAPTER: - break; - default: - break; - } -} -#endif - #ifdef CONFIG_OF_LIBFDT __weak int esdhc_status_fixup(void *blob, const char *compat) { @@ -1441,10 +1358,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, compat, "clock-frequency", gd->arch.sdhc_clk, 1); #endif -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT - do_fixup_by_compat_u32(blob, compat, "adapter-type", - (u32)(gd->arch.sdhc_adapter), 1); -#endif } #endif @@ -1654,7 +1567,6 @@ static const struct udevice_id fsl_esdhc_ids[] = { { .compatible = "fsl,imx6q-usdhc", }, { .compatible = "fsl,imx7d-usdhc", .data = (ulong)&usdhc_imx7d_data,}, { .compatible = "fsl,imx7ulp-usdhc", }, - { .compatible = "fsl,esdhc", }, { /* sentinel */ } }; diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index e05b24e7e8..8abd28ea50 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -17,10 +17,6 @@ /* needed for the mmc_cfg definition */ #include -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include "../board/freescale/common/qixis.h" -#endif - /* FSL eSDHC-specific constants */ #define SYSCTL 0x0002e02c #define SYSCTL_INITA 0x08000000