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Lu" To: "u-boot@lists.denx.de" Thread-Topic: [v3, 2/5] mmc: split fsl_esdhc driver for i.MX Thread-Index: AQHVD7J2W/eAxB1iwUmege02oOhLdA== Date: Tue, 21 May 2019 08:52:03 +0000 Message-ID: <20190521085215.6263-3-yangbo.lu@nxp.com> References: <20190521085215.6263-1-yangbo.lu@nxp.com> In-Reply-To: <20190521085215.6263-1-yangbo.lu@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK2PR03CA0054.apcprd03.prod.outlook.com (2603:1096:202:17::24) To AM4PR0401MB2226.eurprd04.prod.outlook.com (2603:10a6:200:50::8) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yangbo.lu@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: f6ba79be-51bc-4da8-4611-08d6ddc99871 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600141)(711020)(4605104)(4618075)(2017052603328)(7193020); SRVR:AM4PR0401MB2402; x-ms-traffictypediagnostic: AM4PR0401MB2402: x-ld-processed: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:7691; x-forefront-prvs: 0044C17179 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(346002)(376002)(39860400002)(136003)(396003)(366004)(199004)(189003)(66066001)(81156014)(8676002)(1076003)(2351001)(53936002)(478600001)(68736007)(4326008)(52116002)(99286004)(7406005)(76176011)(50226002)(256004)(2501003)(8936002)(2616005)(446003)(476003)(71200400001)(11346002)(81166006)(71190400001)(486006)(25786009)(6506007)(386003)(26005)(2906002)(86362001)(316002)(102836004)(305945005)(7736002)(5660300002)(6436002)(6116002)(66446008)(6486002)(6512007)(66946007)(6916009)(3846002)(66476007)(66556008)(5640700003)(64756008)(7366002)(14454004)(54906003)(36756003)(7416002)(73956011)(186003); DIR:OUT; SFP:1101; SCL:1; SRVR:AM4PR0401MB2402; H:AM4PR0401MB2226.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: /0EcR0QSWy11TaDbYeJl5rvLiiLtRDB3hhqspnswwrQT+MvXt8+h+urdY4Fc993+Kywh51N65Odduos2TCQV2V80tkhAFiIYLphrUBfJHgS9YL5AoZOzr2QBX+aSDeCNdMM+lozB8DRyNmIANjvvOfWITBZwQSoKZONSXtrKKgKU5I+hvJ0bhXUiaEFWky7129rlECqwlNkoO4gdLgkgT9CZq5UX7OnU5vZYroyobcanI/A9g0tVOKPE+K7AZyhYpbEP7w+6qS4ywUANCj4gBsggcVbInyU1eqSKj0Xt/QGBu+7Xy1hCqiyGLy8WRaHaRWwrmstL6i0PJkh5ugGxWgOdQymcDxl3FZaL27EJcYrpukjCmMVhtCdLyUMBFSVnnai7jh5WO3xMMOJcq6gw7dpoLqQ779WpL+3uSjHqk+8= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f6ba79be-51bc-4da8-4611-08d6ddc99871 X-MS-Exchange-CrossTenant-originalarrivaltime: 21 May 2019 08:52:03.9763 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM4PR0401MB2402 X-Mailman-Approved-At: Tue, 21 May 2019 12:39:15 +0000 Cc: =?utf-8?q?Eddy_Petri=C8=99or?= , Nikita Kiryanov , Patrick Bruenn , Adrian Alonso , Bhaskar Upadhaya , Vanessa Maegima , Albert ARIBAUD , Joe Hershberger , =?utf-8?q?Eric_B=C3=A9nard?= , Ken Lin , Stefan Roese , Richard Hu , Marek Vasut , Boris Brezillon , Max Krummenacher , Stefan Agner , Ian Ray , Andrej Rosano , Fabien Lahoudere , Alexey Brodkin , Vinitha V Pillai , Simone CIANNI , Markus Niebel , Jason Liu , dl-uboot-imx , Ingo Schroeck , Andreas Geisreiter , Otavio Salvador , Parthiban Nallathambi , Breno Matheus Lima , Alison Wang , Lucile Quirion , Raffaele RECALCATI , Akshay Bhat , Ludwig Zenz , Olaf Mandel , =?utf-8?q?Antti_M=C3=A4entausta?= , Martyn Welch , Angelo Dureghello , Soeren Moch , Francesco Montefoschi Subject: [U-Boot] [v3, 2/5] mmc: split fsl_esdhc driver for i.MX X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX initially. The later QoriQ series PowerPC processors (which were evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and i.MX series processors were using this driver for their eSDHCs too. For the two series processors, the eSDHCs are becoming more and more different. We should have split it into two drivers, like them (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel. This patch is just to create a fsl_esdhc_imx driver which is a copy of fsl_esdhc driver for i.MX processors. We will convert i.MX processors to use fsl_esdhc_imx, and clean up the two drivers separately in the future patches. Signed-off-by: Yangbo Lu Reviewed-by: Peng Fan --- Changes for v2: - None. Changes for v3: - None. --- drivers/mmc/Kconfig | 6 ++++++ drivers/mmc/Makefile | 1 + drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} | 5 +++-- include/{fsl_esdhc.h => fsl_esdhc_imx.h} | 11 ++++++----- 4 files changed, 16 insertions(+), 7 deletions(-) copy drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} (99%) copy include/{fsl_esdhc.h => fsl_esdhc_imx.h} (97%) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c23299ea96..4e33fa1b2d 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -671,6 +671,12 @@ config FSL_ESDHC This selects support for the eSDHC (enhanced secure digital host controller) found on numerous Freescale/NXP SoCs. +config FSL_ESDHC_IMX + bool "Freescale/NXP i.MX eSDHC controller support" + help + This selects support for the i.MX eSDHC (enhanced secure digital host + controller) found on numerous Freescale/NXP SoCs. + endmenu config SYS_FSL_ERRATUM_ESDHC111 diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 0076fc393b..3c8c53a9e1 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -26,6 +26,7 @@ obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o obj-$(CONFIG_MMC_DW_SNPS) += snps_dw_mmc.o obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o +obj-$(CONFIG_FSL_ESDHC_IMX) += fsl_esdhc_imx.o obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o obj-$(CONFIG_MMC_MESON_GX) += meson_gx_mmc.o diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc_imx.c similarity index 99% copy from drivers/mmc/fsl_esdhc.c copy to drivers/mmc/fsl_esdhc_imx.c index 1b7de74a72..faf133390f 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -2,6 +2,7 @@ /* * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc * Andy Fleming + * Copyright 2019 NXP * * Based vaguely on the pxa mmc code: * (C) Copyright 2003 @@ -18,7 +19,7 @@ #include #include #include -#include +#include #include #include #include @@ -110,7 +111,7 @@ struct esdhc_soc_data { * @non_removable: 0: removable; 1: non-removable * @wp_enable: 1: enable checking wp; 0: no check * @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V - * @flags: ESDHC_FLAG_xx in include/fsl_esdhc.h + * @flags: ESDHC_FLAG_xx in include/fsl_esdhc_imx.h * @caps: controller capabilities * @tuning_step: tuning step setting in tuning_ctrl register * @start_tuning_tap: the start point for tuning in tuning_ctrl register diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc_imx.h similarity index 97% copy from include/fsl_esdhc.h copy to include/fsl_esdhc_imx.h index 8dbd5249a7..e05b24e7e8 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc_imx.h @@ -4,10 +4,11 @@ *------------------------------------------------------------------- * * Copyright 2007-2008,2010-2011 Freescale Semiconductor, Inc + * Copyright 2019 NXP */ -#ifndef __FSL_ESDHC_H__ -#define __FSL_ESDHC_H__ +#ifndef __FSL_ESDHC_IMX_H__ +#define __FSL_ESDHC_IMX_H__ #include #include @@ -258,15 +259,15 @@ struct fsl_esdhc_cfg { #error "Endianess is not defined: please fix to continue" #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int fsl_esdhc_mmc_init(bd_t *bis); int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg); void fdt_fixup_esdhc(void *blob, bd_t *bd); #else static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; } static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {} -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ void __noreturn mmc_boot(void); void mmc_spl_load_image(uint32_t offs, unsigned int size, void *vdst); -#endif /* __FSL_ESDHC_H__ */ +#endif /* __FSL_ESDHC_IMX_H__ */