From patchwork Thu Apr 25 10:29:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1090672 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44qYRj58d4z9s3q for ; Thu, 25 Apr 2019 20:33:05 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 46B46C21D4A; Thu, 25 Apr 2019 10:32:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=KHOP_BIG_TO_CC autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 30BCAC21D65; Thu, 25 Apr 2019 10:31:04 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 2A3F3C21DFB; Thu, 25 Apr 2019 10:30:33 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by lists.denx.de (Postfix) with ESMTPS id C0BF1C21DD4 for ; Thu, 25 Apr 2019 10:30:29 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 44qYNj4G3zz1rJgl; Thu, 25 Apr 2019 12:30:29 +0200 (CEST) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 44qYNj40CDz1qyC6; Thu, 25 Apr 2019 12:30:29 +0200 (CEST) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id 0VTlssoWMiSF; Thu, 25 Apr 2019 12:30:28 +0200 (CEST) X-Auth-Info: lmUHfIg5r5D7TA+dOBNkjbVmUbnyam5Ax/6S6pOujVI= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Thu, 25 Apr 2019 12:30:28 +0200 (CEST) From: Lukasz Majewski To: Stefano Babic , Fabio Estevam , Marek Vasut , Simon Glass , Tom Rini , u-boot@lists.denx.de, Jagan Teki , Peng Fan , Marcel Ziswiler , Adam Ford Date: Thu, 25 Apr 2019 12:29:47 +0200 Message-Id: <20190425102953.5348-6-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190425102953.5348-1-lukma@denx.de> References: <20190425102953.5348-1-lukma@denx.de> Subject: [U-Boot] [PATCH v3 05/11] clk: Provide struct clk for fixed rate clock (clk_fixed_rate.c) X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Up till now the fixed rate clock ('osc') has been added to UCLASS_CLK without declaring struct clk. As a result it was only accessible by iterating the udevice's uclass list. This is a problem for clock code, which operates on pointers to struct clk (like clk_get_rate()), not udevices. After this change struct clk is accessible from udevice and udevice from struct clk. Signed-off-by: Lukasz Majewski Reviewed-by: Peng Fan --- Changes in v3: None drivers/clk/clk_fixed_rate.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c index 50dbb13655..089f060a23 100644 --- a/drivers/clk/clk_fixed_rate.c +++ b/drivers/clk/clk_fixed_rate.c @@ -8,6 +8,7 @@ #include struct clk_fixed_rate { + struct clk clk; unsigned long fixed_rate; }; @@ -24,10 +25,14 @@ const struct clk_ops clk_fixed_rate_ops = { static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev) { + struct clk *clk = &to_clk_fixed_rate(dev)->clk; #if !CONFIG_IS_ENABLED(OF_PLATDATA) to_clk_fixed_rate(dev)->fixed_rate = dev_read_u32_default(dev, "clock-frequency", 0); #endif + /* Make fixed rate clock accessible from higher level struct clk */ + dev->driver_data = (ulong)clk; + clk->dev = dev; return 0; }