From patchwork Thu Apr 4 10:26:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 1077085 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44ZfL951wJz9sB3 for ; Thu, 4 Apr 2019 21:28:33 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 697A0C21DFD; Thu, 4 Apr 2019 10:27:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E8D8CC21C38; Thu, 4 Apr 2019 10:27:24 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 381B4C21DED; Thu, 4 Apr 2019 10:27:23 +0000 (UTC) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10]) by lists.denx.de (Postfix) with ESMTPS id 5A32FC21C29 for ; Thu, 4 Apr 2019 10:27:23 +0000 (UTC) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 44ZfJp6h3Xz1rcqp; Thu, 4 Apr 2019 12:27:22 +0200 (CEST) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 44ZfJp50stz1qrhq; Thu, 4 Apr 2019 12:27:22 +0200 (CEST) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id pOTomUC38Nmx; Thu, 4 Apr 2019 12:27:21 +0200 (CEST) X-Auth-Info: 7dGNdoobsSk4fYqFwdf6CdP+SXY0je2xF+ZjoIKiJGM= Received: from localhost.localdomain (85-222-111-42.dynamic.chello.pl [85.222.111.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Thu, 4 Apr 2019 12:27:21 +0200 (CEST) From: Lukasz Majewski To: Stefano Babic , u-boot@lists.denx.de, Fabio Estevam , Fabio Estevam , Marcel Ziswiler , Stefan Agner Date: Thu, 4 Apr 2019 12:26:44 +0200 Message-Id: <20190404102656.21405-3-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190404102656.21405-1-lukma@denx.de> References: <20190404102656.21405-1-lukma@denx.de> Subject: [U-Boot] [imx-next PATCH v1 02/14] DTS: Add esdhc3 device tree description tuning for HSC|DDC boards X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" In this commit the esdhc3 controller is enabled as well as it is remaped to mmc0 to not break legacy code. The pinctrl setup (e.g. 0x1e4) is the same as one from in-board file definition. Signed-off-by: Lukasz Majewski --- arch/arm/dts/imx53-kp.dts | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/dts/imx53-kp.dts b/arch/arm/dts/imx53-kp.dts index 3ce4445c18..a551fc945b 100644 --- a/arch/arm/dts/imx53-kp.dts +++ b/arch/arm/dts/imx53-kp.dts @@ -17,6 +17,18 @@ chosen { stdout-path = &uart2; }; + + aliases { + mmc0 = &esdhc3; + }; +}; + +&esdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc3>; + bus-width = <8>; + non-removable; + status = "okay"; }; &fec { @@ -61,6 +73,21 @@ pinctrl-0 = <&pinctrl_hog>; imx53-kp { + pinctrl_esdhc3: esdhc3grp { + fsl,pins = < + MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d4 + MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d4 + MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d4 + MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d4 + MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d4 + MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d4 + MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d4 + MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d4 + MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1e4 + MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d4 + >; + }; + pinctrl_eth: ethgrp { fsl,pins = < MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc