From patchwork Fri Mar 22 15:32:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dalon L Westergreen X-Patchwork-Id: 1061319 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44QnjK1Ky7z9sRx for ; Sat, 23 Mar 2019 02:32:53 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id D8AC2C21C57; Fri, 22 Mar 2019 15:32:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 2ADEEC220C7; Fri, 22 Mar 2019 15:32:24 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 2789FC21C57; Fri, 22 Mar 2019 15:32:23 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lists.denx.de (Postfix) with ESMTPS id 5562BC21C57 for ; Fri, 22 Mar 2019 15:32:22 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Mar 2019 08:32:18 -0700 X-IronPort-AV: E=Sophos;i="5.60,256,1549958400"; d="scan'208";a="127743850" Received: from jjdegroo-mobl.amr.corp.intel.com (HELO dwesterg-mobl.amr.corp.intel.com) ([10.255.230.90]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Mar 2019 08:32:18 -0700 From: Dalon Westergreen To: u-boot@lists.denx.de, marex@denx.de, ley.foon.tan@intel.com, sjg@chromium.org Date: Fri, 22 Mar 2019 08:32:08 -0700 Message-Id: <20190322153208.8440-2-dalon.westergreen@linux.intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190322153208.8440-1-dalon.westergreen@linux.intel.com> References: <20190322153208.8440-1-dalon.westergreen@linux.intel.com> MIME-Version: 1.0 Subject: [U-Boot] [PATCH 2/2] ARM: socfpga: stratix10: Remove CONFIG_OF_EMBED X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Dalon Westergreen CONFIG_OF_EMBED was primarily enabled to support the stratix10 spl hex file requirements. Since this option now produces a warning during build, and the spl hex can be created using alternate methods, CONFIG_OF_EMBED is no longer needed. Signed-off-by: Dalon Westergreen Reviewed-by: Simon Glass --- configs/socfpga_stratix10_defconfig | 1 - include/configs/socfpga_stratix10_socdk.h | 4 ++-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 9e6d582ee3..346175fd7a 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -26,7 +26,6 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y -CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h index 0e73239f56..813b96b028 100644 --- a/include/configs/socfpga_stratix10_socdk.h +++ b/include/configs/socfpga_stratix10_socdk.h @@ -200,7 +200,7 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); * 0x8000_0000 ...... End of SDRAM_1 (assume 2GB) * */ -#define CONFIG_SPL_TARGET "spl/u-boot-spl.hex" +#define CONFIG_SPL_TARGET "spl/u-boot-spl-dtb.hex" #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR @@ -214,6 +214,6 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); /* SPL SDMMC boot support */ #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" #endif /* __CONFIG_H */