From patchwork Thu Mar 21 04:32:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangbo Lu X-Patchwork-Id: 1059782 X-Patchwork-Delegate: van.freenix@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="jKeXUHYe"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44Pv7j5wpYz9sRC for ; Thu, 21 Mar 2019 15:34:09 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 80903C22027; Thu, 21 Mar 2019 04:33:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=SPF_HELO_PASS, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 03502C2206E; Thu, 21 Mar 2019 04:32:39 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 707AEC22038; Thu, 21 Mar 2019 04:32:36 +0000 (UTC) Received: from EUR01-HE1-obe.outbound.protection.outlook.com (mail-eopbgr130070.outbound.protection.outlook.com [40.107.13.70]) by lists.denx.de (Postfix) with ESMTPS id 6252BC2205C for ; Thu, 21 Mar 2019 04:32:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=rm2LT9tqTrIpCABpHSACbQxPRN1TDhnImzAJhv1wAaw=; b=jKeXUHYeGjdT9zu2YUJivUZ8ac/oUllV5MKcofaWvn6wDUmF33iLf6eovFW7In8hBWdSpr6fAMsvwvpBg5mklfGDVTJZCOIH8fnbdbjehVLacsYbmTqW0IHktZAnXw/7MJVOXkR5nJbknPbNIQ5Z58+b6boa/gBKopqHA2g60/8= Received: from VI1PR0401MB2237.eurprd04.prod.outlook.com (10.169.133.18) by VI1PR0401MB2592.eurprd04.prod.outlook.com (10.168.65.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1709.16; Thu, 21 Mar 2019 04:32:28 +0000 Received: from VI1PR0401MB2237.eurprd04.prod.outlook.com ([fe80::c118:ba51:b223:4b33]) by VI1PR0401MB2237.eurprd04.prod.outlook.com ([fe80::c118:ba51:b223:4b33%2]) with mapi id 15.20.1730.013; Thu, 21 Mar 2019 04:32:28 +0000 From: "Y.b. Lu" To: "u-boot@lists.denx.de" Thread-Topic: [v2, 2/5] mmc: split fsl_esdhc driver for i.MX Thread-Index: AQHU358XDUDF1UKDckaBpao/r3GxNQ== Date: Thu, 21 Mar 2019 04:32:28 +0000 Message-ID: <20190321043404.1833-3-yangbo.lu@nxp.com> References: <20190321043404.1833-1-yangbo.lu@nxp.com> In-Reply-To: <20190321043404.1833-1-yangbo.lu@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0P153CA0010.APCP153.PROD.OUTLOOK.COM (2603:1096:203:18::22) To VI1PR0401MB2237.eurprd04.prod.outlook.com (2603:10a6:800:28::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yangbo.lu@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 82cb4e3d-11db-4daf-eca9-08d6adb63968 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600127)(711020)(4605104)(4618075)(2017052603328)(7153060)(7193020); SRVR:VI1PR0401MB2592; x-ms-traffictypediagnostic: VI1PR0401MB2592: x-microsoft-antispam-prvs: x-forefront-prvs: 0983EAD6B2 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(136003)(39860400002)(346002)(396003)(366004)(376002)(199004)(189003)(4326008)(6116002)(6512007)(53936002)(105586002)(5640700003)(52116002)(305945005)(2351001)(99286004)(71200400001)(1076003)(256004)(71190400001)(106356001)(486006)(5660300002)(66066001)(81156014)(8676002)(81166006)(476003)(50226002)(478600001)(446003)(25786009)(316002)(86362001)(14454004)(6486002)(186003)(26005)(102836004)(6916009)(6506007)(76176011)(386003)(2616005)(11346002)(2906002)(97736004)(3846002)(7736002)(68736007)(8936002)(54906003)(2501003)(6436002)(36756003); DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR0401MB2592; H:VI1PR0401MB2237.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: cRtHN/K8Fn0XB78GbL02Nxqwz0zxSnHx+uZzBCCcj2MjJKTk2IZZ2js2QLvSaduy8cJXDFDHCItcpdTjjU6Z3uqBXORJ1I9VHuvFC1j3UnxAKgtjFF/+t7Cw7wFjgibsC3BmoiFosduMXbO91Ly6G0S/PdL2+gulJGC7QEwzZT6ov0jnQa7OigK7CeiNoGKbjbmvCfgOiki6Nuj4Mn3qxTMVvZbVUvC3kGf5/2BeLS1OEdU+4nXBS2xrK7FC6SWqNqiCwv+82OshYB/0R/ir+EGw1NS/4FYruVIl3Nc1PpevyIfdTxZn8mZZ5/SEt6e1rZq5wSoMc7eSHOEA56HUfh49XHI47gmXStWbwy7MzKt7H5cKSRcGiIvU2pFXDqa//DJAf24glx4rTa9fzYtaVhwfnLypJ8zqi5U8CheybgI= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 82cb4e3d-11db-4daf-eca9-08d6adb63968 X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Mar 2019 04:32:28.1497 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0401MB2592 Subject: [U-Boot] [v2, 2/5] mmc: split fsl_esdhc driver for i.MX X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX initially. The later QoriQ series PowerPC processors (which were evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and i.MX series processors were using this driver for their eSDHCs too. For the two series processors, the eSDHCs are becoming more and more different. We should have split it into two drivers, like them (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel. This patch is just to create a fsl_esdhc_imx driver which is a copy of fsl_esdhc driver for i.MX processors. We will convert i.MX processors to use fsl_esdhc_imx, and clean up the two drivers separately in the future patches. Signed-off-by: Yangbo Lu --- Changes for v2: - None. --- drivers/mmc/Kconfig | 6 ++++++ drivers/mmc/Makefile | 1 + drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} | 5 +++-- include/{fsl_esdhc.h => fsl_esdhc_imx.h} | 11 ++++++----- 4 files changed, 16 insertions(+), 7 deletions(-) copy drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} (99%) copy include/{fsl_esdhc.h => fsl_esdhc_imx.h} (97%) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 04a4e7716f..09bc02fe9c 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -641,6 +641,12 @@ config FSL_ESDHC This selects support for the eSDHC (enhanced secure digital host controller) found on numerous Freescale/NXP SoCs. +config FSL_ESDHC_IMX + bool "Freescale/NXP i.MX eSDHC controller support" + help + This selects support for the i.MX eSDHC (enhanced secure digital host + controller) found on numerous Freescale/NXP SoCs. + endmenu config SYS_FSL_ERRATUM_ESDHC111 diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 7892c468f0..1287ad4cc1 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_MMC_DW_K3) += hi6220_dw_mmc.o obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o +obj-$(CONFIG_FSL_ESDHC_IMX) += fsl_esdhc_imx.o obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o obj-$(CONFIG_MMC_MESON_GX) += meson_gx_mmc.o diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc_imx.c similarity index 99% copy from drivers/mmc/fsl_esdhc.c copy to drivers/mmc/fsl_esdhc_imx.c index 9e34557d16..a031c628ea 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -2,6 +2,7 @@ /* * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc * Andy Fleming + * Copyright 2019 NXP * * Based vaguely on the pxa mmc code: * (C) Copyright 2003 @@ -18,7 +19,7 @@ #include #include #include -#include +#include #include #include #include @@ -110,7 +111,7 @@ struct esdhc_soc_data { * @non_removable: 0: removable; 1: non-removable * @wp_enable: 1: enable checking wp; 0: no check * @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V - * @flags: ESDHC_FLAG_xx in include/fsl_esdhc.h + * @flags: ESDHC_FLAG_xx in include/fsl_esdhc_imx.h * @caps: controller capabilities * @tuning_step: tuning step setting in tuning_ctrl register * @start_tuning_tap: the start point for tuning in tuning_ctrl register diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc_imx.h similarity index 97% copy from include/fsl_esdhc.h copy to include/fsl_esdhc_imx.h index 8dbd5249a7..e05b24e7e8 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc_imx.h @@ -4,10 +4,11 @@ *------------------------------------------------------------------- * * Copyright 2007-2008,2010-2011 Freescale Semiconductor, Inc + * Copyright 2019 NXP */ -#ifndef __FSL_ESDHC_H__ -#define __FSL_ESDHC_H__ +#ifndef __FSL_ESDHC_IMX_H__ +#define __FSL_ESDHC_IMX_H__ #include #include @@ -258,15 +259,15 @@ struct fsl_esdhc_cfg { #error "Endianess is not defined: please fix to continue" #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int fsl_esdhc_mmc_init(bd_t *bis); int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg); void fdt_fixup_esdhc(void *blob, bd_t *bd); #else static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; } static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {} -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ void __noreturn mmc_boot(void); void mmc_spl_load_image(uint32_t offs, unsigned int size, void *vdst); -#endif /* __FSL_ESDHC_H__ */ +#endif /* __FSL_ESDHC_IMX_H__ */