diff mbox series

[U-Boot,2/3] arm: socfpga: a10: move SPL stack size to Kconfig

Message ID 20190228203348.28424-2-simon.k.r.goldschmidt@gmail.com
State Superseded
Delegated to: Marek Vasut
Headers show
Series [U-Boot,1/3] arm: socfpga: fix comment about SPL memory layout | expand

Commit Message

Simon Goldschmidt Feb. 28, 2019, 8:33 p.m. UTC
Instead of fixing the SPL stack to 64 KiB in the board config header via
CONFIG_SYS_SPL_MALLOC_SIZE, let's just use CONFIG_SPL_SYS_MALLOC_F_LEN
in the defconfig.

This also has the advandage that it removes sub-mach specific ifdefs in
socfpga_common.h.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
---

 configs/socfpga_arria10_defconfig |  1 +
 include/configs/socfpga_common.h  | 14 --------------
 2 files changed, 1 insertion(+), 14 deletions(-)

Comments

Marek Vasut Feb. 28, 2019, 9:27 p.m. UTC | #1
On 2/28/19 9:33 PM, Simon Goldschmidt wrote:
> Instead of fixing the SPL stack to 64 KiB in the board config header via
> CONFIG_SYS_SPL_MALLOC_SIZE, let's just use CONFIG_SPL_SYS_MALLOC_F_LEN
> in the defconfig.
> 
> This also has the advandage that it removes sub-mach specific ifdefs in
> socfpga_common.h.
> 
> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

Can't we default these stack sizes with imply in Kconfig files instead ?
Then they won't have to be in the defconfigs either.

> ---
> 
>  configs/socfpga_arria10_defconfig |  1 +
>  include/configs/socfpga_common.h  | 14 --------------
>  2 files changed, 1 insertion(+), 14 deletions(-)
> 
> diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
> index f321a0ac3b..8d0479cc05 100644
> --- a/configs/socfpga_arria10_defconfig
> +++ b/configs/socfpga_arria10_defconfig
> @@ -2,6 +2,7 @@ CONFIG_ARM=y
>  CONFIG_ARCH_SOCFPGA=y
>  CONFIG_SYS_TEXT_BASE=0x01000040
>  CONFIG_SYS_MALLOC_F_LEN=0x2000
> +CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000
>  CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
>  CONFIG_SPL=y
>  CONFIG_IDENT_STRING="socfpga_arria10"
> diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
> index a3fbca0a5d..c23b34186a 100644
> --- a/include/configs/socfpga_common.h
> +++ b/include/configs/socfpga_common.h
> @@ -251,16 +251,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
>  #define CONFIG_SPL_TEXT_BASE		CONFIG_SYS_INIT_RAM_ADDR
>  #define CONFIG_SPL_MAX_SIZE		CONFIG_SYS_INIT_RAM_SIZE
>  
> -#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> -/* SPL memory allocation configuration, this is for FAT implementation */
> -#ifndef CONFIG_SYS_SPL_MALLOC_START
> -#define CONFIG_SYS_SPL_MALLOC_SIZE	0x00010000
> -#define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SYS_INIT_RAM_SIZE - \
> -					 CONFIG_SYS_SPL_MALLOC_SIZE + \
> -					 CONFIG_SYS_INIT_RAM_ADDR)
> -#endif
> -#endif
> -
>  /* SPL SDMMC boot support */
>  #ifdef CONFIG_SPL_MMC_SUPPORT
>  #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
> @@ -287,11 +277,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
>  /*
>   * Stack setup
>   */
> -#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
>  #define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR
> -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> -#define CONFIG_SPL_STACK		CONFIG_SYS_SPL_MALLOC_START
> -#endif
>  
>  /* Extra Environment */
>  #ifndef CONFIG_SPL_BUILD
>
Simon Goldschmidt March 1, 2019, 7:48 a.m. UTC | #2
On Thu, Feb 28, 2019 at 10:44 PM Marek Vasut <marex@denx.de> wrote:
>
> On 2/28/19 9:33 PM, Simon Goldschmidt wrote:
> > Instead of fixing the SPL stack to 64 KiB in the board config header via
> > CONFIG_SYS_SPL_MALLOC_SIZE, let's just use CONFIG_SPL_SYS_MALLOC_F_LEN
> > in the defconfig.
> >
> > This also has the advandage that it removes sub-mach specific ifdefs in
> > socfpga_common.h.
> >
> > Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
>
> Can't we default these stack sizes with imply in Kconfig files instead ?
> Then they won't have to be in the defconfigs either.

I guess you mean default the *malloc* sizes, not *stack* sizes? Yes, that
should work.

I started this whole series because all gen5 defconfigs set the initial malloc
size to 8 KiB, while I monitored socrates to only need a bit more than 1 KiB.
With my reset patches, something around 1.5 KiB is still enough. So I'd
move that to imply 2 KiB for gen5 and 64 KiB for a10 in a patch 4/4 for v2.

Regards,
Simon

>
> > ---
> >
> >  configs/socfpga_arria10_defconfig |  1 +
> >  include/configs/socfpga_common.h  | 14 --------------
> >  2 files changed, 1 insertion(+), 14 deletions(-)
> >
> > diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
> > index f321a0ac3b..8d0479cc05 100644
> > --- a/configs/socfpga_arria10_defconfig
> > +++ b/configs/socfpga_arria10_defconfig
> > @@ -2,6 +2,7 @@ CONFIG_ARM=y
> >  CONFIG_ARCH_SOCFPGA=y
> >  CONFIG_SYS_TEXT_BASE=0x01000040
> >  CONFIG_SYS_MALLOC_F_LEN=0x2000
> > +CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000
> >  CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
> >  CONFIG_SPL=y
> >  CONFIG_IDENT_STRING="socfpga_arria10"
> > diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
> > index a3fbca0a5d..c23b34186a 100644
> > --- a/include/configs/socfpga_common.h
> > +++ b/include/configs/socfpga_common.h
> > @@ -251,16 +251,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
> >  #define CONFIG_SPL_TEXT_BASE         CONFIG_SYS_INIT_RAM_ADDR
> >  #define CONFIG_SPL_MAX_SIZE          CONFIG_SYS_INIT_RAM_SIZE
> >
> > -#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > -/* SPL memory allocation configuration, this is for FAT implementation */
> > -#ifndef CONFIG_SYS_SPL_MALLOC_START
> > -#define CONFIG_SYS_SPL_MALLOC_SIZE   0x00010000
> > -#define CONFIG_SYS_SPL_MALLOC_START  (CONFIG_SYS_INIT_RAM_SIZE - \
> > -                                      CONFIG_SYS_SPL_MALLOC_SIZE + \
> > -                                      CONFIG_SYS_INIT_RAM_ADDR)
> > -#endif
> > -#endif
> > -
> >  /* SPL SDMMC boot support */
> >  #ifdef CONFIG_SPL_MMC_SUPPORT
> >  #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
> > @@ -287,11 +277,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
> >  /*
> >   * Stack setup
> >   */
> > -#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> >  #define CONFIG_SPL_STACK             CONFIG_SYS_INIT_SP_ADDR
> > -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > -#define CONFIG_SPL_STACK             CONFIG_SYS_SPL_MALLOC_START
> > -#endif
> >
> >  /* Extra Environment */
> >  #ifndef CONFIG_SPL_BUILD
> >
>
>
> --
> Best regards,
> Marek Vasut
Marek Vasut March 1, 2019, 11:40 a.m. UTC | #3
On 3/1/19 8:48 AM, Simon Goldschmidt wrote:
> On Thu, Feb 28, 2019 at 10:44 PM Marek Vasut <marex@denx.de> wrote:
>>
>> On 2/28/19 9:33 PM, Simon Goldschmidt wrote:
>>> Instead of fixing the SPL stack to 64 KiB in the board config header via
>>> CONFIG_SYS_SPL_MALLOC_SIZE, let's just use CONFIG_SPL_SYS_MALLOC_F_LEN
>>> in the defconfig.
>>>
>>> This also has the advandage that it removes sub-mach specific ifdefs in
>>> socfpga_common.h.
>>>
>>> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
>>
>> Can't we default these stack sizes with imply in Kconfig files instead ?
>> Then they won't have to be in the defconfigs either.
> 
> I guess you mean default the *malloc* sizes, not *stack* sizes? Yes, that
> should work.

Yes, that's what I meant.

> I started this whole series because all gen5 defconfigs set the initial malloc
> size to 8 KiB, while I monitored socrates to only need a bit more than 1 KiB.
> With my reset patches, something around 1.5 KiB is still enough. So I'd
> move that to imply 2 KiB for gen5 and 64 KiB for a10 in a patch 4/4 for v2.

Sounds good!

> Regards,
> Simon
> 
>>
>>> ---
>>>
>>>  configs/socfpga_arria10_defconfig |  1 +
>>>  include/configs/socfpga_common.h  | 14 --------------
>>>  2 files changed, 1 insertion(+), 14 deletions(-)
>>>
>>> diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
>>> index f321a0ac3b..8d0479cc05 100644
>>> --- a/configs/socfpga_arria10_defconfig
>>> +++ b/configs/socfpga_arria10_defconfig
>>> @@ -2,6 +2,7 @@ CONFIG_ARM=y
>>>  CONFIG_ARCH_SOCFPGA=y
>>>  CONFIG_SYS_TEXT_BASE=0x01000040
>>>  CONFIG_SYS_MALLOC_F_LEN=0x2000
>>> +CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000
>>>  CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
>>>  CONFIG_SPL=y
>>>  CONFIG_IDENT_STRING="socfpga_arria10"
>>> diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
>>> index a3fbca0a5d..c23b34186a 100644
>>> --- a/include/configs/socfpga_common.h
>>> +++ b/include/configs/socfpga_common.h
>>> @@ -251,16 +251,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
>>>  #define CONFIG_SPL_TEXT_BASE         CONFIG_SYS_INIT_RAM_ADDR
>>>  #define CONFIG_SPL_MAX_SIZE          CONFIG_SYS_INIT_RAM_SIZE
>>>
>>> -#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
>>> -/* SPL memory allocation configuration, this is for FAT implementation */
>>> -#ifndef CONFIG_SYS_SPL_MALLOC_START
>>> -#define CONFIG_SYS_SPL_MALLOC_SIZE   0x00010000
>>> -#define CONFIG_SYS_SPL_MALLOC_START  (CONFIG_SYS_INIT_RAM_SIZE - \
>>> -                                      CONFIG_SYS_SPL_MALLOC_SIZE + \
>>> -                                      CONFIG_SYS_INIT_RAM_ADDR)
>>> -#endif
>>> -#endif
>>> -
>>>  /* SPL SDMMC boot support */
>>>  #ifdef CONFIG_SPL_MMC_SUPPORT
>>>  #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
>>> @@ -287,11 +277,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
>>>  /*
>>>   * Stack setup
>>>   */
>>> -#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
>>>  #define CONFIG_SPL_STACK             CONFIG_SYS_INIT_SP_ADDR
>>> -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
>>> -#define CONFIG_SPL_STACK             CONFIG_SYS_SPL_MALLOC_START
>>> -#endif
>>>
>>>  /* Extra Environment */
>>>  #ifndef CONFIG_SPL_BUILD
>>>
>>
>>
>> --
>> Best regards,
>> Marek Vasut
diff mbox series

Patch

diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
index f321a0ac3b..8d0479cc05 100644
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -2,6 +2,7 @@  CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_TEXT_BASE=0x01000040
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000
 CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
 CONFIG_SPL=y
 CONFIG_IDENT_STRING="socfpga_arria10"
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index a3fbca0a5d..c23b34186a 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -251,16 +251,6 @@  unsigned int cm_get_qspi_controller_clk_hz(void);
 #define CONFIG_SPL_TEXT_BASE		CONFIG_SYS_INIT_RAM_ADDR
 #define CONFIG_SPL_MAX_SIZE		CONFIG_SYS_INIT_RAM_SIZE
 
-#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
-/* SPL memory allocation configuration, this is for FAT implementation */
-#ifndef CONFIG_SYS_SPL_MALLOC_START
-#define CONFIG_SYS_SPL_MALLOC_SIZE	0x00010000
-#define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SYS_INIT_RAM_SIZE - \
-					 CONFIG_SYS_SPL_MALLOC_SIZE + \
-					 CONFIG_SYS_INIT_RAM_ADDR)
-#endif
-#endif
-
 /* SPL SDMMC boot support */
 #ifdef CONFIG_SPL_MMC_SUPPORT
 #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
@@ -287,11 +277,7 @@  unsigned int cm_get_qspi_controller_clk_hz(void);
 /*
  * Stack setup
  */
-#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
 #define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR
-#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
-#define CONFIG_SPL_STACK		CONFIG_SYS_SPL_MALLOC_START
-#endif
 
 /* Extra Environment */
 #ifndef CONFIG_SPL_BUILD