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Thu, 21 Feb 2019 04:31:07 +0000 Received: from BN8PR04MB6050.namprd04.prod.outlook.com ([fe80::f87a:cb97:e3a:b8e7]) by BN8PR04MB6050.namprd04.prod.outlook.com ([fe80::f87a:cb97:e3a:b8e7%4]) with mapi id 15.20.1622.020; Thu, 21 Feb 2019 04:31:07 +0000 From: Anup Patel To: Rick Chen , Bin Meng , Joe Hershberger , Michal Simek , Michal Simek , Lukas Auer , Masahiro Yamada , Simon Glass Thread-Topic: [PATCH v9 09/15] clk: Add fixed-factor clock driver Thread-Index: AQHUyZ5DCBdL3G0LnkKlrK9m4DDcAw== Date: Thu, 21 Feb 2019 04:31:07 +0000 Message-ID: <20190221042936.13441-10-anup.patel@wdc.com> References: <20190221042936.13441-1-anup.patel@wdc.com> In-Reply-To: <20190221042936.13441-1-anup.patel@wdc.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MAXPR0101CA0070.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:e::32) To BN8PR04MB6050.namprd04.prod.outlook.com (2603:10b6:408:53::32) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Anup.Patel@wdc.com; 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Signed-off-by: Atish Patra Signed-off-by: Anup Patel Reviewed-by: Simon Glass --- arch/sandbox/dts/test.dts | 8 +++ .../clock/fixed-factor-clock.txt | 24 +++++++ drivers/clk/Makefile | 4 +- drivers/clk/clk_fixed_factor.c | 72 +++++++++++++++++++ test/dm/clk.c | 5 +- 5 files changed, 111 insertions(+), 2 deletions(-) create mode 100644 doc/device-tree-bindings/clock/fixed-factor-clock.txt create mode 100644 drivers/clk/clk_fixed_factor.c diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 1d011ded7c..cb8d686e46 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -203,6 +203,14 @@ #clock-cells = <0>; clock-frequency = <1234>; }; + + clk_fixed_factor: clk-fixed-factor { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <3>; + clock-mult = <2>; + clocks = <&clk_fixed>; + }; }; clk_sandbox: clk-sbox { diff --git a/doc/device-tree-bindings/clock/fixed-factor-clock.txt b/doc/device-tree-bindings/clock/fixed-factor-clock.txt new file mode 100644 index 0000000000..1bae8527eb --- /dev/null +++ b/doc/device-tree-bindings/clock/fixed-factor-clock.txt @@ -0,0 +1,24 @@ +Binding for simple fixed factor rate clock sources. + +This binding uses the common clock binding[1]. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt + +Required properties: +- compatible : shall be "fixed-factor-clock". +- #clock-cells : from common clock binding; shall be set to 0. +- clock-div: fixed divider. +- clock-mult: fixed multiplier. +- clocks: parent clock. + +Optional properties: +- clock-output-names : From common clock binding. + +Example: + clock { + compatible = "fixed-factor-clock"; + clocks = <&parentclk>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + }; diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index de3d60ed05..1d9d725cae 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -4,7 +4,9 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # -obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o clk_fixed_rate.o +obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o +obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_rate.o +obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_factor.o obj-y += imx/ obj-y += tegra/ diff --git a/drivers/clk/clk_fixed_factor.c b/drivers/clk/clk_fixed_factor.c new file mode 100644 index 0000000000..9e00544889 --- /dev/null +++ b/drivers/clk/clk_fixed_factor.c @@ -0,0 +1,72 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2019 Western Digital Corporation or its affiliates. + * + * Author: Anup Patel + */ + +#include +#include +#include +#include + +struct clk_fixed_factor { + struct clk parent; + unsigned int div; + unsigned int mult; +}; + +#define to_clk_fixed_factor(dev) \ + ((struct clk_fixed_factor *)dev_get_platdata(dev)) + +static ulong clk_fixed_factor_get_rate(struct clk *clk) +{ + uint64_t rate; + struct clk_fixed_factor *ff = to_clk_fixed_factor(clk->dev); + + if (clk->id != 0) + return -EINVAL; + + rate = clk_get_rate(&ff->parent); + if (IS_ERR_VALUE(rate)) + return rate; + + do_div(rate, ff->div); + + return rate * ff->mult; +} + +const struct clk_ops clk_fixed_factor_ops = { + .get_rate = clk_fixed_factor_get_rate, +}; + +static int clk_fixed_factor_ofdata_to_platdata(struct udevice *dev) +{ + int err; + struct clk_fixed_factor *ff = to_clk_fixed_factor(dev); + + err = clk_get_by_index(dev, 0, &ff->parent); + if (err) + return err; + + ff->div = dev_read_u32_default(dev, "clock-div", 1); + ff->mult = dev_read_u32_default(dev, "clock-mult", 1); + + return 0; +} + +static const struct udevice_id clk_fixed_factor_match[] = { + { + .compatible = "fixed-factor-clock", + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(clk_fixed_factor) = { + .name = "fixed_factor_clock", + .id = UCLASS_CLK, + .of_match = clk_fixed_factor_match, + .ofdata_to_platdata = clk_fixed_factor_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct clk_fixed_factor), + .ops = &clk_fixed_factor_ops, +}; diff --git a/test/dm/clk.c b/test/dm/clk.c index 898c034e27..112d5cbbc9 100644 --- a/test/dm/clk.c +++ b/test/dm/clk.c @@ -12,12 +12,15 @@ static int dm_test_clk(struct unit_test_state *uts) { - struct udevice *dev_fixed, *dev_clk, *dev_test; + struct udevice *dev_fixed, *dev_fixed_factor, *dev_clk, *dev_test; ulong rate; ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed", &dev_fixed)); + ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed-factor", + &dev_fixed_factor)); + ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox", &dev_clk)); ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));