From patchwork Sun Feb 17 09:25:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 1043623 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="q59IPjxE"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 442M920N5Hz9sDX for ; Sun, 17 Feb 2019 20:27:33 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 8BDF0C21E2B; Sun, 17 Feb 2019 09:26:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C0DF4C21E74; Sun, 17 Feb 2019 09:26:33 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 6A3D3C21E68; Sun, 17 Feb 2019 09:26:21 +0000 (UTC) Received: from mail-pl1-f193.google.com (mail-pl1-f193.google.com [209.85.214.193]) by lists.denx.de (Postfix) with ESMTPS id 6D80CC21C29 for ; Sun, 17 Feb 2019 09:26:17 +0000 (UTC) Received: by mail-pl1-f193.google.com with SMTP id bj4so7238891plb.7 for ; Sun, 17 Feb 2019 01:26:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NwRqkIQHrjNTs4kC0OkEMC3FpLl54SgJxPXLkM2f4z8=; b=q59IPjxEXu6WlEPjLpM0DEB4yTTxxXFX5nQ1AUNUgt20PPoCU03WUsy4Gn6lUiMd5L 0p3DrIHH67QJXsRukd7HO4losf3TTXZfiGTjAxPM9tXN7c75gLaWMa0TcjhctphB4ssn FK+8uaz2Ac+J2ulSk2AacqWtF5fKcByllA4wFAaDvoAX5OC8dCxQW8vZLdE+6t+k40gG bsOG0EUiS6COdsbU0a/YDcNstqGNu3CGlGQPTphpC13t4mooez+jWm9dIfjdahObPTtt aCYUAX0h8e+eqGzofrEq/aYNuV/uSBqWYKNFc/5XG5oCIGAhXiTBOE/huTI0XKUdZTnb Lq1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NwRqkIQHrjNTs4kC0OkEMC3FpLl54SgJxPXLkM2f4z8=; b=DXIw+U+EmVlyaYCCsaSqsMzcP/sxL9d2/leeQOtafmGeYIg4s4jjgByH3c1kMNWKSF kkvtCC7m3DpR/cwb7RUV4yMnGZdf99D0bnLxKZGeJz76c17hah9mf4F0RyFhlEvY2Etz cbCchYsSeF7BX9N+Tm6fdYCarWCvIzpjpeqxGstyXedLIYYt/AjoAEQKSRc5K7jn2KFJ WRwSSmNne5q8A+mgsLtRyraxyvAa7Ys+LgM/NAL0vhcpoR5P+WVfDDHbnvkFyP1MOI9k e7+4zHtTqkDzkn37GRFc2UDuw1PEv9aHcEc1ERrv2p7bZ6Zw7GtmlUBGmy3JzdVFj1dz og2A== X-Gm-Message-State: AHQUAuZGcL+u8v97yfxQTau1t33D963U8Lzd+3c4GWlhMAc5c1SXuYV7 V0AeYvFsuT6XSjesCQZuoF2vvi/Gxxo= X-Google-Smtp-Source: AHgI3IZCAfiobm96Oc/le1gXT2Ukscwoj6P92XwHxPC/LReUasShMiCJkP/xxtqHMBwo1JKV2M3aKw== X-Received: by 2002:a17:902:1009:: with SMTP id b9mr18025204pla.42.1550395575611; Sun, 17 Feb 2019 01:26:15 -0800 (PST) Received: from chrisp-dl.ws.atlnz.lc ([2001:df5:b000:22:3a2c:4aff:fe70:2b02]) by smtp.gmail.com with ESMTPSA id s190sm17003532pfb.103.2019.02.17.01.26.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 17 Feb 2019 01:26:15 -0800 (PST) From: Chris Packham To: u-boot@lists.denx.de, Albert Aribaud , Tom Rini , Stefan Roese Date: Sun, 17 Feb 2019 22:25:54 +1300 Message-Id: <20190217092555.20212-3-judge.packham@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190217092555.20212-1-judge.packham@gmail.com> References: <20190217092555.20212-1-judge.packham@gmail.com> MIME-Version: 1.0 Cc: Ryder Lee , Michal Simek , Shreenidhi Shedi , Chris Packham , Xiaoliang Yang Subject: [U-Boot] [PATCH v3 2/3] watchdog: orion_wdt: take timeout value in ms X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The generic wdt_start API expects to be called with the timeout in milliseconds. Update the orion_wdt driver to accept a timeout in milliseconds and use the clock rate specified in the dts to convert the timeout to an appropriate value for the timer reload register. Signed-off-by: Chris Packham --- It turned out to be easy enough to make orion_wdt conform to the expected wdt APIs. It looks like the turris_mox already assumed a timeout in ms, so only the turris_omnia needed updating. Changes in v3: - new Changes in v2: None board/CZ.NIC/turris_omnia/turris_omnia.c | 2 +- drivers/watchdog/Kconfig | 1 + drivers/watchdog/orion_wdt.c | 22 ++++++++++++++++++---- 3 files changed, 20 insertions(+), 5 deletions(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 1f7650cb3610..5e0b686c597d 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -379,7 +379,7 @@ int board_init(void) puts("Cannot find Armada 385 watchdog!\n"); } else { puts("Enabling Armada 385 watchdog.\n"); - wdt_start(watchdog_dev, (u32) 25000000 * 120, 0); + wdt_start(watchdog_dev, 120000, 0); } # endif diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 115fc4551ffd..7f7bc4bbc494 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -97,6 +97,7 @@ config WDT_BCM6345 config WDT_ORION bool "Orion watchdog timer support" depends on WDT + select CLK help Select this to enable Orion watchdog timer, which can be found on some Marvell Armada chips. diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c index c1add3e7c121..03632938f239 100644 --- a/drivers/watchdog/orion_wdt.c +++ b/drivers/watchdog/orion_wdt.c @@ -14,6 +14,7 @@ #include #include +#include #include #include #include @@ -27,6 +28,8 @@ struct orion_wdt_priv { void __iomem *rstout; void __iomem *rstout_mask; u32 timeout; + unsigned long clk_rate; + struct clk clk; }; #define RSTOUT_ENABLE_BIT BIT(8) @@ -44,17 +47,18 @@ static int orion_wdt_reset(struct udevice *dev) struct orion_wdt_priv *priv = dev_get_priv(dev); /* Reload watchdog duration */ - writel(priv->timeout, priv->reg + priv->wdt_counter_offset); + writel(priv->clk_rate * priv->timeout, + priv->reg + priv->wdt_counter_offset); return 0; } -static int orion_wdt_start(struct udevice *dev, u64 timeout, ulong flags) +static int orion_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags) { struct orion_wdt_priv *priv = dev_get_priv(dev); u32 reg; - priv->timeout = (u32) timeout; + priv->timeout = timeout_ms / 1000; /* Enable the fixed watchdog clock input */ reg = readl(priv->reg + TIMER_CTRL); @@ -62,7 +66,8 @@ static int orion_wdt_start(struct udevice *dev, u64 timeout, ulong flags) writel(reg, priv->reg + TIMER_CTRL); /* Set watchdog duration */ - writel(priv->timeout, priv->reg + priv->wdt_counter_offset); + writel(priv->clk_rate * priv->timeout, + priv->reg + priv->wdt_counter_offset); /* Clear the watchdog expiration bit */ reg = readl(priv->reg + TIMER_A370_STATUS); @@ -147,9 +152,18 @@ err: static int orion_wdt_probe(struct udevice *dev) { + struct orion_wdt_priv *priv = dev_get_priv(dev); + int ret; + debug("%s: Probing wdt%u\n", __func__, dev->seq); orion_wdt_stop(dev); + ret = clk_get_by_name(dev, "fixed", &priv->clk); + if (!ret) + priv->clk_rate = clk_get_rate(&priv->clk); + else + priv->clk_rate = 25000000; + return 0; }