| Message ID | 20190204105846.26889-2-fparent@baylibre.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | Add support for MT8516 SoCs | expand |
On Mon, 2019-02-04 at 11:58 +0100, Fabien Parent wrote: > Some MediaTek SoC need an additional clock "source_cg". Enable > this new clock. We reuse the same clock name as in the kernel. > > Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com> > --- > drivers/mmc/mtk-sd.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c > index d3f0778368..8573ea7430 100644 > --- a/drivers/mmc/mtk-sd.c > +++ b/drivers/mmc/mtk-sd.c > @@ -247,7 +247,9 @@ struct msdc_host { > struct msdc_compatible *dev_comp; > > struct clk src_clk; /* for SD/MMC bus clock */ > + struct clk src_clk_cg; /* optional, MSDC source clock control gate */ > struct clk h_clk; /* MSDC core clock */ > + bool has_src_clk_cg; <just_checking> Could we have a chance to get rid of this flag? </just_checking> > u32 src_clk_freq; /* source clock */ > u32 mclk; /* mmc framework required bus clock */ > @@ -1269,6 +1271,8 @@ static void msdc_ungate_clock(struct msdc_host *host) > { > clk_enable(&host->src_clk); > clk_enable(&host->h_clk); > + if (host->has_src_clk_cg) > + clk_enable(&host->src_clk_cg); > } > > static int msdc_drv_probe(struct udevice *dev) > @@ -1332,6 +1336,10 @@ static int msdc_ofdata_to_platdata(struct udevice *dev) > if (ret < 0) > return ret; > > + ret = clk_get_by_name(dev, "source_cg", &host->src_clk_cg); /* optional */ > + if (!ret) > + host->has_src_clk_cg = true; > + > #if IS_ENABLED(DM_GPIO) > gpio_request_by_name(dev, "wp-gpios", 0, &host->gpio_wp, GPIOD_IS_IN); > gpio_request_by_name(dev, "cd-gpios", 0, &host->gpio_cd, GPIOD_IS_IN);
diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c index d3f0778368..8573ea7430 100644 --- a/drivers/mmc/mtk-sd.c +++ b/drivers/mmc/mtk-sd.c @@ -247,7 +247,9 @@ struct msdc_host { struct msdc_compatible *dev_comp; struct clk src_clk; /* for SD/MMC bus clock */ + struct clk src_clk_cg; /* optional, MSDC source clock control gate */ struct clk h_clk; /* MSDC core clock */ + bool has_src_clk_cg; u32 src_clk_freq; /* source clock */ u32 mclk; /* mmc framework required bus clock */ @@ -1269,6 +1271,8 @@ static void msdc_ungate_clock(struct msdc_host *host) { clk_enable(&host->src_clk); clk_enable(&host->h_clk); + if (host->has_src_clk_cg) + clk_enable(&host->src_clk_cg); } static int msdc_drv_probe(struct udevice *dev) @@ -1332,6 +1336,10 @@ static int msdc_ofdata_to_platdata(struct udevice *dev) if (ret < 0) return ret; + ret = clk_get_by_name(dev, "source_cg", &host->src_clk_cg); /* optional */ + if (!ret) + host->has_src_clk_cg = true; + #if IS_ENABLED(DM_GPIO) gpio_request_by_name(dev, "wp-gpios", 0, &host->gpio_wp, GPIOD_IS_IN); gpio_request_by_name(dev, "cd-gpios", 0, &host->gpio_cd, GPIOD_IS_IN);
Some MediaTek SoC need an additional clock "source_cg". Enable this new clock. We reuse the same clock name as in the kernel. Signed-off-by: Fabien Parent <fparent@baylibre.com> --- drivers/mmc/mtk-sd.c | 8 ++++++++ 1 file changed, 8 insertions(+)