From patchwork Fri Jan 25 20:30:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Goldschmidt X-Patchwork-Id: 1031291 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="DWEFdvIf"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43mW1V57vZz9sBn for ; Sat, 26 Jan 2019 07:33:02 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 66D28C21E18; Fri, 25 Jan 2019 20:31:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 55E6CC21E2C; Fri, 25 Jan 2019 20:31:13 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id BD18EC21DF9; Fri, 25 Jan 2019 20:31:08 +0000 (UTC) Received: from mail-wr1-f67.google.com (mail-wr1-f67.google.com [209.85.221.67]) by lists.denx.de (Postfix) with ESMTPS id BA08CC21DD3 for ; Fri, 25 Jan 2019 20:31:03 +0000 (UTC) Received: by mail-wr1-f67.google.com with SMTP id t6so11617352wrr.12 for ; Fri, 25 Jan 2019 12:31:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=O8ltu1gdK47GTJ73DnxNFNDlj9yK7exwmUTZC3AkJLY=; b=DWEFdvIfJf7mSh61BmScktM/o3OsJo4LOOBQ6rZm4dqtCd6eoZH2af0yuIVud8wBu/ uH0bRqC5cUbiplbf4vO5mDeP9mGMhO2QqfwbOJQA7EZfMuzRRIwQeDUYpK/dSJOL2AMp mX4AVTDyc/+NWy0xHJorcEk3h68h9xdhtQfrKds1PSDbBa512q4CSWJxCFXPI0zfm0IF AVF4Z64/gDPIYLfR4ngBwOc2y4jAQmh7+Ho+MibX0BidEU8vYOHS4x3M9Y4r3HKNfIGU DbAizfjiQSJSZ/X4h/kv9YDO0LCg78oS5fwhH+QoBP4eb5aNDW5cPCVU20ozqxYVjgcX hzEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=O8ltu1gdK47GTJ73DnxNFNDlj9yK7exwmUTZC3AkJLY=; b=g8bHGi/H7BcLvIfpw2PwmNGg+BKdUN9OsZOTxpL2CaaPOgQEOJpoRNu+Qp/dn4c6FW euHaGvL3Jd3rpjSiCxu2HopWLqE5x2egK5LjuqjEAx9GAHGxRfAZN+bQEIyuwmhB05gi YOQHLKG+JhcmdwOrsCsm0XcgTXp+BrrkJCbq+56QNl6KMc43WoRvKmXRFlrEbPke4mzL Xzaf3HnkfCs1o+D9HIv9A/RNk8tLIx4QlrS4cszk2vZdytIuh8IaNjDxhkJXaJVaQORz 5yqsnVW9iOxsgsrZRRdyl7uarD23/HoeVfsE2pnrk+AZN0HT/mw/EGCiZs1PkhVuitf4 CdMQ== X-Gm-Message-State: AJcUukef91Ie//U+i+OCdISvxr1/tl+dWHp6o/5/mPcRV553aq508kwq kdYLl9UfShxugZoLQQbKheY= X-Google-Smtp-Source: ALg8bN5tkYvRF+YTLvsSl9WGXOlSF7d4ehB4ws/eHOCvbcym4vMP/Ut7e36HchSbeYFnnuIEin1e0g== X-Received: by 2002:a5d:6549:: with SMTP id z9mr12535798wrv.116.1548448263385; Fri, 25 Jan 2019 12:31:03 -0800 (PST) Received: from ubuntu.home ([2a02:8071:6a3:700:8c22:ee0c:efc8:ed86]) by smtp.gmail.com with ESMTPSA id 124sm69507236wmh.22.2019.01.25.12.31.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 25 Jan 2019 12:31:02 -0800 (PST) From: Simon Goldschmidt To: Marek Vasut , Dinh Nguyen , u-boot@lists.denx.de Date: Fri, 25 Jan 2019 21:30:51 +0100 Message-Id: <20190125203051.10943-6-simon.k.r.goldschmidt@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190125203051.10943-1-simon.k.r.goldschmidt@gmail.com> References: <20190125203051.10943-1-simon.k.r.goldschmidt@gmail.com> Cc: Tom Rini Subject: [U-Boot] [PATCH 5/5] arm: socfpga: implement proper peripheral reset X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This commit removes ad-hoc reset handling for peripheral resets from SPL for socfpga gen5. This is done because as U-Boot drivers support reset handling by now. For kernels that don't support taking peripherals out of reset that are not enabled by U-Boot, a new Kconfig option "OLD_SOCFPGA_KERNEL_COMPAT" is added, which keeps the old behaviour of just enabling all peripherals. This new option is enabled by default for now, as even Linux 4.20 does not support reset handling on all peripherals. Signed-off-by: Simon Goldschmidt --- arch/arm/mach-socfpga/Kconfig | 10 ++++++++++ arch/arm/mach-socfpga/misc_gen5.c | 2 ++ arch/arm/mach-socfpga/spl_gen5.c | 10 ++++++++++ 3 files changed, 22 insertions(+) diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 5e87371f8c..89acced8d8 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -142,4 +142,14 @@ config SYS_CONFIG_NAME default "socfpga_stratix10_socdk" if TARGET_SOCFPGA_STRATIX10_SOCDK default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA +config OLD_SOCFPGA_KERNEL_COMPAT + bool "Enable workarounds for booting old kernels" + depends on TARGET_SOCFPGA_GEN5 + default y + help + Set this to enable various workarounds for old kernels (e.g. take all + peripherals out of reset because old kernels cannot handle reset). + This results in sub-optimal settings for newer kernels, only enable + if needed. + endif diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c index 04f237d100..168669923e 100644 --- a/arch/arm/mach-socfpga/misc_gen5.c +++ b/arch/arm/mach-socfpga/misc_gen5.c @@ -243,6 +243,7 @@ int arch_early_init_r(void) /* Add device descriptor to FPGA device table */ socfpga_fpga_add(&altera_fpga[0]); +#ifdef CONFIG_OLD_SOCFPGA_KERNEL_COMPAT #ifdef CONFIG_DESIGNWARE_SPI /* Get Designware SPI controller out of reset */ socfpga_per_reset(SOCFPGA_RESET(SPIM0), 0); @@ -252,6 +253,7 @@ int arch_early_init_r(void) #ifdef CONFIG_NAND_DENALI socfpga_per_reset(SOCFPGA_RESET(NAND), 0); #endif +#endif /* CONFIG_OLD_SOCFPGA_KERNEL_COMPAT */ return 0; } diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c index f9bea892b1..19a211256d 100644 --- a/arch/arm/mach-socfpga/spl_gen5.c +++ b/arch/arm/mach-socfpga/spl_gen5.c @@ -35,16 +35,22 @@ u32 spl_boot_device(void) return BOOT_DEVICE_RAM; case 0x2: /* NAND Flash (1.8V) */ case 0x3: /* NAND Flash (3.0V) */ +#ifdef CONFIG_OLD_SOCFPGA_KERNEL_COMPAT socfpga_per_reset(SOCFPGA_RESET(NAND), 0); +#endif return BOOT_DEVICE_NAND; case 0x4: /* SD/MMC External Transceiver (1.8V) */ case 0x5: /* SD/MMC Internal Transceiver (3.0V) */ +#ifdef CONFIG_OLD_SOCFPGA_KERNEL_COMPAT socfpga_per_reset(SOCFPGA_RESET(SDMMC), 0); socfpga_per_reset(SOCFPGA_RESET(DMA), 0); +#endif return BOOT_DEVICE_MMC1; case 0x6: /* QSPI Flash (1.8V) */ case 0x7: /* QSPI Flash (3.0V) */ +#ifdef CONFIG_OLD_SOCFPGA_KERNEL_COMPAT socfpga_per_reset(SOCFPGA_RESET(QSPI), 0); +#endif return BOOT_DEVICE_SPI; default: printf("Invalid boot device (bsel=%08x)!\n", bsel); @@ -98,7 +104,9 @@ void board_init_f(ulong dummy) socfpga_bridges_reset(1); } +#ifdef CONFIG_OLD_SOCFPGA_KERNEL_COMPAT socfpga_per_reset(SOCFPGA_RESET(UART0), 0); +#endif socfpga_per_reset(SOCFPGA_RESET(OSC1TIMER0), 0); timer_init(); @@ -122,9 +130,11 @@ void board_init_f(ulong dummy) sysmgr_pinmux_init(); sysmgr_config_warmrstcfgio(0); +#ifdef CONFIG_OLD_SOCFPGA_KERNEL_COMPAT /* De-assert reset for peripherals and bridges based on handoff */ reset_deassert_peripherals_handoff(); socfpga_bridges_reset(0); +#endif debug("Unfreezing/Thaw all I/O banks\n"); /* unfreeze / thaw all IO banks */