Message ID | 20190123164808.128994-7-anup.patel@wdc.com |
---|---|
State | Superseded |
Delegated to: | Andes |
Headers | show
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Series |
SiFive FU540 Support
|
expand
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diff --git a/arch/riscv/cpu/generic/dram.c b/arch/riscv/cpu/generic/dram.c index 84d87d2a7f..b7b1207235 100644 --- a/arch/riscv/cpu/generic/dram.c +++ b/arch/riscv/cpu/generic/dram.c @@ -5,6 +5,9 @@ #include <common.h> #include <fdtdec.h> +#include <linux/sizes.h> + +DECLARE_GLOBAL_DATA_PTR; int dram_init(void) { @@ -15,3 +18,20 @@ int dram_init_banksize(void) { return fdtdec_setup_memory_banksize(); } + +ulong board_get_usable_ram_top(ulong total_size) +{ +#ifdef CONFIG_64BIT + /* + * Ensure that we run from first 4GB so that all + * addresses used by U-Boot are 32bit addresses. + * + * This in-turn ensures that 32bit DMA capable + * devices work fine because DMA mapping APIs will + * provide 32bit DMA addresses only. + */ + if (gd->ram_top > SZ_4G) + return SZ_4G; +#endif + return gd->ram_top; +}