From patchwork Wed Jan 23 16:05:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Carlo Caione X-Patchwork-Id: 1030034 X-Patchwork-Delegate: joe.hershberger@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="GmOcaL7R"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43l9Cm34ysz9s3l for ; Thu, 24 Jan 2019 03:07:16 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 17393C21DEC; Wed, 23 Jan 2019 16:06:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 23DF4C21DDC; Wed, 23 Jan 2019 16:06:44 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id A8725C21C38; Wed, 23 Jan 2019 16:06:40 +0000 (UTC) Received: from mail-wr1-f65.google.com (mail-wr1-f65.google.com [209.85.221.65]) by lists.denx.de (Postfix) with ESMTPS id 4C022C21C27 for ; Wed, 23 Jan 2019 16:06:40 +0000 (UTC) Received: by mail-wr1-f65.google.com with SMTP id z5so3093471wrt.11 for ; Wed, 23 Jan 2019 08:06:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=etCdB7yIZnyWYDXL/HE5iG8Caim8JtP/RCryk9ZIJm8=; b=GmOcaL7RIupWlc2IQ7EIRbVboazCRUki15gzhCJ5AkXuE2spS03RGbYk3rm2Trb6IR UuWyJSc3QUkWxVLHad2x7xxODlJTY/vTaufzcC0VQy6gJ//zwT17BdSMDSjAQCPt3S4T WSMlxcL6vNZHqQLVB7MX4fUh3NztivN64U4hPywOciSqN80QhMOOacL3HPoHWn7HowQH 9dTyYetizyDjVdsqzycZTTGUURfRTPcLZvrwCOP5yNIdi2Wf4Oh598euO/tBGPhc+eBA cQjuwEQbSKGZUaeEdbWxRjr5USuC3VjQyAiOwdhuLCpDdyj1dPVxGI7yyx07XifrCHKx +2Uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=etCdB7yIZnyWYDXL/HE5iG8Caim8JtP/RCryk9ZIJm8=; b=qe+0VezyHcJluo3pslATimRT8Hd88BnuAxdhdCWwbI52gl7aJi3zWSYF9PxgFZsvT7 YOxwoaRgtBtD+xPhM5vNDsE95dTVCF8+4dcVbIb76Ibzsdd1DM2ewse1GzRRacUkUtJx mzTP7Zr/UZzN+/Huf4Rp7jLaapeyg0sgd01X97KUyyKPJjwzh2RUm0UMBQaaU8UxEOga WZ/vhdxL4fc7OgpAJeTXhP/aiYV35HSplBXpK+RCHk85TcGCabg2t1UwxytWKjS8hlR3 +bYpnFgGXJrGaerrJ8FgC0B738bmUMvoebm1b4JfuW9OsTVYwbfJaXIG39jnk12W7S8r 9B7A== X-Gm-Message-State: AJcUukdveiymgdIV1H5l6ipOlprjiKLFRT+6yrA/xt78Eii5xvJX83Lf hBU9W9ldG50nOc3y5Qk3CHU7vA== X-Google-Smtp-Source: ALg8bN4p1vYtCKxCfjwI3YeqTVjTJuaWeuPbTkIkevKT2lK0fgsuTVKd2j3Zdm4NGxDF2HiZg86fpg== X-Received: by 2002:adf:e5d0:: with SMTP id a16mr3399277wrn.89.1548259599891; Wed, 23 Jan 2019 08:06:39 -0800 (PST) Received: from localhost.localdomain ([2a00:23c4:f7a1:ce00:5105:4b7b:c922:7c6]) by smtp.gmail.com with ESMTPSA id s16sm88252414wrt.77.2019.01.23.08.06.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 23 Jan 2019 08:06:38 -0800 (PST) From: Carlo Caione To: joe.hershberger@ni.com, joseph.hershberger@ni.com, vladimir.oltean@nxp.com, u-boot@lists.denx.de Date: Wed, 23 Jan 2019 16:05:50 +0000 Message-Id: <20190123160552.766-2-ccaione@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190123160552.766-1-ccaione@baylibre.com> References: <20190123160552.766-1-ccaione@baylibre.com> MIME-Version: 1.0 Cc: Carlo Caione Subject: [U-Boot] [PATCH v3 1/3] net: phy: Add support for accessing MMD PHY registers X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Two new helper functions (phy_read_mmd() and phy_write_mmd()) are added to allow access to the MMD PHY registers. The MMD PHY registers can be accessed by two means: 1. Using two new MMD access function hooks in the PHY driver. These functions can be implemented when the PHY driver does not support the standard IEEE Compatible clause 45 access mechanism described in clause 22 or if the PHY uses its own non-standard access mechanism. 2. The standard clause 45 access extensions to the MMD registers through the indirection registers (clause 22) in all the other cases. Signed-off-by: Carlo Caione Acked-by: Joe Hershberger --- drivers/net/phy/phy.c | 4 ++++ include/phy.h | 52 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 56 insertions(+) diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index cda4caa803..6769047407 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -549,6 +549,10 @@ int phy_register(struct phy_driver *drv) drv->readext += gd->reloc_off; if (drv->writeext) drv->writeext += gd->reloc_off; + if (drv->read_mmd) + drv->read_mmd += gd->reloc_off; + if (drv->write_mmd) + drv->write_mmd += gd->reloc_off; #endif return 0; } diff --git a/include/phy.h b/include/phy.h index b86fdfb2ce..f6f6f097af 100644 --- a/include/phy.h +++ b/include/phy.h @@ -101,6 +101,13 @@ struct phy_driver { int (*readext)(struct phy_device *phydev, int addr, int devad, int reg); int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg, u16 val); + + /* Phy specific driver override for reading a MMD register */ + int (*read_mmd)(struct phy_device *phydev, int devad, int reg); + + /* Phy specific driver override for writing a MMD register */ + int (*write_mmd)(struct phy_device *phydev, int devad, int reg, u16 val); + struct list_head list; }; @@ -164,6 +171,51 @@ static inline int phy_write(struct phy_device *phydev, int devad, int regnum, return bus->write(bus, phydev->addr, devad, regnum, val); } +static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad, + int regnum) +{ + /* Write the desired MMD Devad */ + phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad); + + /* Write the desired MMD register address */ + phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum); + + /* Select the Function : DATA with no post increment */ + phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR)); +} + +static inline int phy_read_mmd(struct phy_device *phydev, int devad, + int regnum) +{ + if (regnum > (u16)~0 || devad > 32) + return -EINVAL; + + if (phydev->drv->read_mmd) { + return phydev->drv->read_mmd(phydev, devad, regnum); + } else { + phy_mmd_start_indirect(phydev, devad, regnum); + + /* Read the content of the MMD's selected register */ + return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA); + } +} + +static inline int phy_write_mmd(struct phy_device *phydev, int devad, + int regnum, u16 val) +{ + if (regnum > (u16)~0 || devad > 32) + return -EINVAL; + + if (phydev->drv->write_mmd) { + return phydev->drv->write_mmd(phydev, devad, regnum, val); + } else { + phy_mmd_start_indirect(phydev, devad, regnum); + + /* Write the data into MMD's selected register */ + return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val); + } +} + #ifdef CONFIG_PHYLIB_10G extern struct phy_driver gen10g_driver;