From patchwork Wed Jan 16 18:04:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Carlo Caione X-Patchwork-Id: 1026076 X-Patchwork-Delegate: joe.hershberger@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="QbFEQhRc"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43fwBY3w7Wz9s2P for ; Thu, 17 Jan 2019 05:06:29 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 40985C220D4; Wed, 16 Jan 2019 18:06:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 24281C22113; Wed, 16 Jan 2019 18:06:15 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 22232C220D4; Wed, 16 Jan 2019 18:06:04 +0000 (UTC) Received: from mail-ed1-f67.google.com (mail-ed1-f67.google.com [209.85.208.67]) by lists.denx.de (Postfix) with ESMTPS id 9FF34C21E75 for ; Wed, 16 Jan 2019 18:06:00 +0000 (UTC) Received: by mail-ed1-f67.google.com with SMTP id a20so6155458edc.8 for ; Wed, 16 Jan 2019 10:06:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YfsylZ15fQKrimE6qPsGlZpjjrDU4A3+5F5wgHFUBu8=; b=QbFEQhRcxGIgQtBt0iuuvjeDhrpIlFNaZ3p6Esz4JGKiGbDDOViOz9XlvNlMRj92e5 y8gpHMhrlAIbk7YidWM3WM6xboySwPCfCoDZsycWgyp0iJ6pZsvWPLH4YWxmQowHpR0T 9mIxPhrPoX+ykyjBEHaAPp61RrLPnfHCiSv6+cBVf32Y0zGvMt1RHlbBF55GVW0eNWpC W9t1vIh6IorY+nD+I61Vp7TLJBH7qdnSSUqQw8LNHXi417fiS/n7yd09avBRmZszeOXo JJuoOJffHpszJLqo+hbBjgRofsW5fZkhVpqir5x9NkgedyD+l8WP1T83HRVun0SJ7VLb 2mPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YfsylZ15fQKrimE6qPsGlZpjjrDU4A3+5F5wgHFUBu8=; b=YiZ+6JzqhyRhMhN1lLAPpBCIlVYIEnoMqIJ+TOdYW3pC+HpVmW7Hu6j8DFuxstyRAn FziBQBIETtLhj3t8JlpMetOhE/X9y4cv8jEc1P93QvlTDVblC3BxtQitp22JZHGV9dR/ N79Mc52UInV5V35egcF3IMp+A3+OaHCOkH4qrSVihBoQ1L371VlBRsOOYVqtaqNoLk6h j+XFzEr4Gy9KcitFhC06wDDYPVXTousbHRsxU6PEqsaJP3L+PSqY46hUXBgs2QALCds2 cuSWVUOPDdoLH4vSZi7xBn/bQFMhYP/ZaSDolG3Jla21Z7yJkjnsz5Klv9AwMSLXkIlY hSrw== X-Gm-Message-State: AJcUukeDuwgQXGANEcH6XtymFgHqs+7uh73IXtHM8eeQZMWIiWLFORcS BcO5UJ3JZedABu1oDlP2cSazVA== X-Google-Smtp-Source: ALg8bN7TU/VZ3COXlE6mvMjHXhYV9z9Yl872rMz9aevJj/SbPK3bGaGyPExgfGZiuNSBqcFtrDCuvQ== X-Received: by 2002:a17:906:59cf:: with SMTP id m15-v6mr7768308ejs.199.1547661959282; Wed, 16 Jan 2019 10:05:59 -0800 (PST) Received: from localhost.localdomain ([2a00:23c4:f7a1:ce00:5105:4b7b:c922:7c6]) by smtp.gmail.com with ESMTPSA id n11sm5705555edn.14.2019.01.16.10.05.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Jan 2019 10:05:58 -0800 (PST) From: Carlo Caione To: joe.hershberger@ni.com, u-boot@lists.denx.de, jbrunet@baylibre.com, narmstrong@baylibre.com Date: Wed, 16 Jan 2019 18:04:35 +0000 Message-Id: <20190116180436.8757-2-ccaione@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190116180436.8757-1-ccaione@baylibre.com> References: <20190116180436.8757-1-ccaione@baylibre.com> MIME-Version: 1.0 Cc: Carlo Caione Subject: [U-Boot] [PATCH u-boot 1/2] net: phy: Add support for accessing MMD PHY registers X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Two new helper functions (phy_read_mmd() and phy_write_mmd()) are added to allow access to the MMD PHY registers. The MMD PHY registers can be accessed by two means: 1. Using two new MMD access function hooks in the PHY driver. These functions can be implemented when the PHY driver does not support the standard IEEE Compatible clause 45 access mechanism described in clause 22 or if the PHY uses its own non-standard access mechanism. 2. The standard clause 45 access extensions to the MMD registers through the indirection registers (clause 22) in all the other cases. Signed-off-by: Carlo Caione --- drivers/net/phy/phy.c | 4 +++ include/phy.h | 62 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 66 insertions(+) diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index cda4caa803..6769047407 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -549,6 +549,10 @@ int phy_register(struct phy_driver *drv) drv->readext += gd->reloc_off; if (drv->writeext) drv->writeext += gd->reloc_off; + if (drv->read_mmd) + drv->read_mmd += gd->reloc_off; + if (drv->write_mmd) + drv->write_mmd += gd->reloc_off; #endif return 0; } diff --git a/include/phy.h b/include/phy.h index b86fdfb2ce..0ce41661fa 100644 --- a/include/phy.h +++ b/include/phy.h @@ -101,6 +101,13 @@ struct phy_driver { int (*readext)(struct phy_device *phydev, int addr, int devad, int reg); int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg, u16 val); + + /* Phy specific driver override for reading a MMD register */ + int (*read_mmd)(struct phy_device *phydev, int devad, int reg); + + /* Phy specific driver override for writing a MMD register */ + int (*write_mmd)(struct phy_device *phydev, int devad, int reg, u16 val); + struct list_head list; }; @@ -164,6 +171,61 @@ static inline int phy_write(struct phy_device *phydev, int devad, int regnum, return bus->write(bus, phydev->addr, devad, regnum, val); } +static inline void phy_mmd_indirect(struct phy_device *phydev, int devad, + int regnum) +{ + /* Write the desired MMD Devad */ + phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad); + + /* Write the desired MMD register address */ + phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum); + + /* Select the Function : DATA with no post increment */ + phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR)); +} + +static inline int phy_read_mmd(struct phy_device *phydev, int devad, + int regnum) +{ + int ret; + + if (regnum > (u16)~0 || devad > 32) + return -EINVAL; + + if (phydev->drv->read_mmd) { + ret = phydev->drv->read_mmd(phydev, devad, regnum); + } else { + phy_mmd_indirect(phydev, devad, regnum); + + /* Read the content of the MMD's selected register */ + ret = phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA); + } + + return ret; +} + +static inline int phy_write_mmd(struct phy_device *phydev, int devad, + int regnum, u16 val) +{ + int ret; + + if (regnum > (u16)~0 || devad > 32) + return -EINVAL; + + if (phydev->drv->write_mmd) { + ret = phydev->drv->write_mmd(phydev, devad, regnum, val); + } else { + phy_mmd_indirect(phydev, devad, regnum); + + /* Write the data into MMD's selected register */ + phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val); + + ret = 0; + } + + return ret; +} + #ifdef CONFIG_PHYLIB_10G extern struct phy_driver gen10g_driver;